diff options
Diffstat (limited to 'src/cpu/intel/model_6ex/cache_as_ram_disable.c')
| -rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram_disable.c | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c index 6dac367c4d..cbf7cdd37b 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c +++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c @@ -27,30 +27,6 @@ void stage1_main(unsigned long bist) { unsigned int cpu_reset = 0; -#if !defined(CONFIG_TINY_BOOTBLOCK) || !CONFIG_TINY_BOOTBLOCK -#if CONFIG_USE_FALLBACK_IMAGE == 1 - /* Is this a deliberate reset by the bios */ - if (bios_reset_detected() && last_boot_normal()) { - goto normal_image; - } else { - /* This is the primary cpu how should I boot? */ - check_cmos_failed(); - if (do_normal_boot()) { - goto normal_image; - } - else { - goto fallback_image; - } - } - normal_image: - __asm__ volatile ("jmp __normal_image" - : /* outputs */ - : "a" (bist) /* inputs */ - ); - fallback_image: -#endif -#endif - real_main(bist); /* No servicable parts below this line .. */ |