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-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index beb885ea72..7a40644a6f 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -172,12 +172,6 @@ static void configure_c_states(void)
msr.lo |= (1 << 15); // Lock C-State MSR
wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);
- msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);
- msr.lo &= ~0x7ffff;
- msr.lo |= (PMB0_BASE + 4); // LVL_2 base address
- msr.lo |= (2 << 16); // CST Range: C7 is max C-state
- wrmsr(MSR_PMG_IO_CAPTURE_ADDR, msr);
-
msr = rdmsr(MSR_MISC_PWR_MGMT);
msr.lo &= ~(1 << 0); // Enable P-state HW_ALL coordination
wrmsr(MSR_MISC_PWR_MGMT, msr);