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Diffstat (limited to 'src/cpu/intel/model_2065x')
-rw-r--r--src/cpu/intel/model_2065x/cache_as_ram.inc13
1 files changed, 4 insertions, 9 deletions
diff --git a/src/cpu/intel/model_2065x/cache_as_ram.inc b/src/cpu/intel/model_2065x/cache_as_ram.inc
index 29ff01a26a..93d690748f 100644
--- a/src/cpu/intel/model_2065x/cache_as_ram.inc
+++ b/src/cpu/intel/model_2065x/cache_as_ram.inc
@@ -156,8 +156,8 @@ clear_var_mtrrs:
andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
movl %eax, %cr0
- /* Set up the stack pointer below the end of CAR. */
- movl $(CACHE_AS_RAM_SIZE + CACHE_AS_RAM_BASE - 4), %eax
+ /* Setup the stack. */
+ movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
/* Restore the BIST result. */
@@ -169,11 +169,10 @@ before_romstage:
post_code(0x29)
/* Call romstage.c main function. */
call romstage_main
-
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
- movl %eax, %ebx
+ movl %eax, %esp
post_code(0x30)
@@ -272,11 +271,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
-
- /* Setup stack as indicated by return value from romstage_main(). */
- movl %ebx, %esp
- movl %esp, %ebp
- call copy_and_run
+ call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)