diff options
Diffstat (limited to 'src/cpu/intel/model_2065x')
| -rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index ab4db59e6d..4c88e4412f 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -39,7 +39,7 @@ #include "chip.h" /* - * List of suported C-states in this processor + * List of supported C-states in this processor * * Latencies are typical worst-case package exit time in uS * taken from the SandyBridge BIOS specification. @@ -249,7 +249,7 @@ static void configure_thermal_target(void) return; conf = lapic->chip_info; - /* Set TCC activaiton offset if supported */ + /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); if ((msr.lo & (1 << 30)) && conf->tcc_offset) { msr = rdmsr(MSR_TEMPERATURE_TARGET); |