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Diffstat (limited to 'src/cpu/intel/model_2065x/model_2065x_init.c')
-rw-r--r--src/cpu/intel/model_2065x/model_2065x_init.c78
1 files changed, 0 insertions, 78 deletions
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index f1a2150d71..9bac0dd668 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -20,83 +20,6 @@
#include <cpu/intel/common/common.h>
#include <smp/node.h>
-/*
- * List of supported C-states in this processor
- *
- * Latencies are typical worst-case package exit time in uS
- * taken from the SandyBridge BIOS specification.
- */
-static acpi_cstate_t cstate_map[] = {
- { /* 0: C0 */
- }, { /* 1: C1 */
- .latency = 1,
- .power = 1000,
- .resource = {
- .addrl = 0x00, /* MWAIT State 0 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { /* 2: C1E */
- .latency = 1,
- .power = 1000,
- .resource = {
- .addrl = 0x01, /* MWAIT State 0 Sub-state 1 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { /* 3: C3 */
- .latency = 63,
- .power = 500,
- .resource = {
- .addrl = 0x10, /* MWAIT State 1 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { /* 4: C6 */
- .latency = 87,
- .power = 350,
- .resource = {
- .addrl = 0x20, /* MWAIT State 2 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { /* 5: C7 */
- .latency = 90,
- .power = 200,
- .resource = {
- .addrl = 0x30, /* MWAIT State 3 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { /* 6: C7S */
- .latency = 90,
- .power = 200,
- .resource = {
- .addrl = 0x31, /* MWAIT State 3 Sub-state 1 */
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD,
- }
- },
- { 0 }
-};
-
int cpu_config_tdp_levels(void)
{
msr_t platform_info;
@@ -304,5 +227,4 @@ static const struct cpu_device_id cpu_table[] = {
static const struct cpu_driver driver __cpu_driver = {
.ops = &cpu_dev_ops,
.id_table = cpu_table,
- .cstates = cstate_map,
};