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Diffstat (limited to 'src/cpu/intel/model_2065x/finalize.c')
-rw-r--r--src/cpu/intel/model_2065x/finalize.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c
index 1835dce3db..40204919f6 100644
--- a/src/cpu/intel/model_2065x/finalize.c
+++ b/src/cpu/intel/model_2065x/finalize.c
@@ -56,23 +56,6 @@ void intel_model_2065x_finalize_smm(void)
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
-#ifdef LOCK_POWER_CONTROL_REGISTERS
- /*
- * Lock the power control registers.
- *
- * These registers can be left unlocked if modifying power
- * limits from the OS is desirable. Modifying power limits
- * from the OS can be especially useful for experimentation
- * during early phases of system bringup while the thermal
- * power envelope is being proven.
- */
-
- msr_set_bit(MSR_PP0_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PP1_CURRENT_CONFIG, 31);
- msr_set_bit(MSR_PKG_POWER_LIMIT, 63);
- msr_set_bit(MSR_PP0_POWER_LIMIT, 31);
- msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
-#endif
/* Lock TM interupts - route thermal events to all processors */
msr_set_bit(MSR_MISC_PWR_MGMT, 22);