diff options
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/finalize.c | 2 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/haswell.h | 2 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c index ce22e629e8..b170215ed3 100644 --- a/src/cpu/intel/haswell/finalize.c +++ b/src/cpu/intel/haswell/finalize.c @@ -48,7 +48,7 @@ void intel_cpu_haswell_finalize_smm(void) { #if 0 /* Lock C-State MSR */ - msr_set_bit(MSR_PMG_CST_CONFIG_CONTROL, 15); + msr_set_bit(MSR_PKG_CST_CONFIG_CONTROL, 15); /* Lock AES-NI only if supported */ if (cpuid_ecx(1) & (1 << 25)) diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 8498c1ac75..8e59ccb066 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -58,7 +58,7 @@ #define MSR_PIC_MSG_CONTROL 0x2e #define MSR_PLATFORM_INFO 0xce #define PLATFORM_INFO_SET_TDP (1 << 29) -#define MSR_PMG_CST_CONFIG_CONTROL 0xe2 +#define MSR_PKG_CST_CONFIG_CONTROL 0xe2 #define MSR_PMG_IO_CAPTURE_BASE 0xe4 #define MSR_MISC_PWR_MGMT 0x1aa diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 24de43ec74..bba1410304 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -486,7 +486,7 @@ static void configure_c_states(void) { msr_t msr; - msr = rdmsr(MSR_PMG_CST_CONFIG_CONTROL); + msr = rdmsr(MSR_PKG_CST_CONFIG_CONTROL); msr.lo |= (1 << 30); // Package c-state Undemotion Enable msr.lo |= (1 << 29); // Package c-state Demotion Enable msr.lo |= (1 << 28); // C1 Auto Undemotion Enable @@ -495,7 +495,7 @@ static void configure_c_states(void) msr.lo |= (1 << 25); // C3 Auto Demotion Enable msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection /* The deepest package c-state defaults to factory-configured value. */ - wrmsr(MSR_PMG_CST_CONFIG_CONTROL, msr); + wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr); msr = rdmsr(MSR_PMG_IO_CAPTURE_BASE); msr.lo &= ~0xffff; |