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Diffstat (limited to 'src/cpu/intel/haswell/romstage.c')
| -rw-r--r-- | src/cpu/intel/haswell/romstage.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index edb2fdfccf..bd2513f5e2 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -25,6 +25,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <halt.h> #include <lib.h> #include <timestamp.h> #include <arch/io.h> @@ -49,9 +50,7 @@ static inline void reset_system(void) { hard_reset(); - while (1) { - hlt(); - } + halt(); } /* The cache-as-ram assembly file calls romstage_main() after setting up |