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Diffstat (limited to 'src/cpu/intel/haswell/haswell.h')
| -rw-r--r-- | src/cpu/intel/haswell/haswell.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 3ced0c08db..7a55ef7dac 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -113,6 +113,22 @@ struct romstage_params { }; void mainboard_romstage_entry(unsigned long bist); void romstage_common(const struct romstage_params *params); +/* romstage_main is called from the cache-as-ram assembly file. The return + * value is the stack value to be used for romstage once cache-as-ram is + * torn down. The following values are pushed onto the stack to setup the + * MTRRs: + * +0: Number of MTRRs + * +4: MTTR base 0 31:0 + * +8: MTTR base 0 63:32 + * +12: MTTR mask 0 31:0 + * +16: MTTR mask 0 63:32 + * +20: MTTR base 1 31:0 + * +24: MTTR base 1 63:32 + * +28: MTTR mask 1 31:0 + * +32: MTTR mask 1 63:32 + * ... + */ +void * __attribute__((regparm(0))) romstage_main(unsigned long bist); #endif #ifdef __SMM__ |