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Diffstat (limited to 'src/cpu/intel/haswell/cache_as_ram.inc')
-rw-r--r--src/cpu/intel/haswell/cache_as_ram.inc9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc
index 8601f46a9b..2d1e86fc09 100644
--- a/src/cpu/intel/haswell/cache_as_ram.inc
+++ b/src/cpu/intel/haswell/cache_as_ram.inc
@@ -190,15 +190,6 @@ before_romstage:
post_code(0x2f)
- /* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
- cld
- movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
- movl $(CONFIG_RAMTOP - 24), %edi
- movl $24, %ecx
- rep movsb
-#endif
-
post_code(0x30)
/* Disable cache. */