aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/intel/fsp_model_206ax/Kconfig
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/fsp_model_206ax/Kconfig')
-rw-r--r--src/cpu/intel/fsp_model_206ax/Kconfig50
1 files changed, 0 insertions, 50 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
deleted file mode 100644
index 878244861c..0000000000
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ /dev/null
@@ -1,50 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2013 Sage Electronic Engineering, LLC.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-
-config CPU_INTEL_FSP_MODEL_206AX
- bool
-
-config CPU_INTEL_FSP_MODEL_306AX
- bool
-
-if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX
-
-config CPU_SPECIFIC_OPTIONS
- def_bool y
- select PLATFORM_USES_FSP1_0
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- select SMP
- select SSE2
- select UDELAY_LAPIC
- select SMM_TSEG
- select SUPPORT_CPU_UCODE_IN_CBFS
- select PARALLEL_CPU_INIT
- select TSC_SYNC_MFENCE
- select LAPIC_MONOTONIC_TIMER
- select CPU_INTEL_COMMON
-
-config BOOTBLOCK_CPU_INIT
- string
- default "cpu/intel/fsp_model_206ax/bootblock.c"
-
-config SMM_TSEG_SIZE
- hex
- default 0x800000
-
-endif