diff options
Diffstat (limited to 'src/cpu/intel/ep80579')
-rw-r--r-- | src/cpu/intel/ep80579/Kconfig | 23 | ||||
-rw-r--r-- | src/cpu/intel/ep80579/Makefile.inc | 8 | ||||
-rw-r--r-- | src/cpu/intel/ep80579/ep80579.c | 20 | ||||
-rw-r--r-- | src/cpu/intel/ep80579/ep80579_init.c | 53 |
4 files changed, 0 insertions, 104 deletions
diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig deleted file mode 100644 index dc19ae1c30..0000000000 --- a/src/cpu/intel/ep80579/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -config CPU_INTEL_EP80579 - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select SSE - select SUPPORT_CPU_UCODE_IN_CBFS - -if CPU_INTEL_EP80579 - -# These are just dummy values to keep build happy. -# This CPU does not have tested cache_as_ram.inc. - -config DCACHE_RAM_BASE - hex - default 0xfefc0000 - -config DCACHE_RAM_SIZE - hex - default 0x8000 - -endif diff --git a/src/cpu/intel/ep80579/Makefile.inc b/src/cpu/intel/ep80579/Makefile.inc deleted file mode 100644 index 1af91882c4..0000000000 --- a/src/cpu/intel/ep80579/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -ramstage-y += ep80579.c -ramstage-y += ep80579_init.c -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode diff --git a/src/cpu/intel/ep80579/ep80579.c b/src/cpu/intel/ep80579/ep80579.c deleted file mode 100644 index 044cb4fc91..0000000000 --- a/src/cpu/intel/ep80579/ep80579.c +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Arastra, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> - -struct chip_operations cpu_intel_ep80579_ops = { - CHIP_NAME("EP80579 CPU") -}; diff --git a/src/cpu/intel/ep80579/ep80579_init.c b/src/cpu/intel/ep80579/ep80579_init.c deleted file mode 100644 index d19d4e2fb7..0000000000 --- a/src/cpu/intel/ep80579/ep80579_init.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Arastra, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <device/device.h> -#include <string.h> -#include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> -#include <cpu/x86/msr.h> -#include <cpu/x86/lapic.h> -#include <cpu/intel/microcode.h> -#include <cpu/x86/cache.h> -#include <cpu/x86/mtrr.h> - -static void ep80579_init(struct device *dev) -{ - /* Turn on caching if we haven't already */ - x86_enable_cache(); - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - - /* Enable the local CPU APICs */ - setup_lapic(); -}; - -static struct device_operations cpu_dev_ops = { - .init = ep80579_init, -}; - -static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x10650 }, /* EP80579 */ - { 0, 0 }, -}; - -static const struct cpu_driver driver __cpu_driver = { - .ops = &cpu_dev_ops, - .id_table = cpu_table, -}; |