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Diffstat (limited to 'src/cpu/intel/ep80579/microcode_blob.c')
-rw-r--r--src/cpu/intel/ep80579/microcode_blob.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/cpu/intel/ep80579/microcode_blob.c b/src/cpu/intel/ep80579/microcode_blob.c
new file mode 100644
index 0000000000..cb95b1ae71
--- /dev/null
+++ b/src/cpu/intel/ep80579/microcode_blob.c
@@ -0,0 +1,13 @@
+/*
+ * We support updating microcode from CBFS, but do not have any microcode
+ * updates for this CPU. This will generate a useless cpu_microcode_blob.bin in
+ * CBFS, but this file can be later replaced without needing to recompile the
+ * coreboot.rom image.
+ */
+unsigned microcode_updates_ep80579[] = {
+ /* Dummy terminator */
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+};