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-rw-r--r--src/cpu/intel/common/acpi/cpu.asl37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/cpu/intel/common/acpi/cpu.asl b/src/cpu/intel/common/acpi/cpu.asl
new file mode 100644
index 0000000000..04438a227a
--- /dev/null
+++ b/src/cpu/intel/common/acpi/cpu.asl
@@ -0,0 +1,37 @@
+/* These come from the dynamically created CPU SSDT */
+External(PDC0)
+External(PDC1)
+
+// Power notification
+
+External (\_PR_.CP00, DeviceObj)
+External (\_PR_.CP01, DeviceObj)
+External (\_PR_.CP00._PPC)
+External (\_PR_.CP01._PPC)
+
+Method (PNOT)
+{
+ If (MPEN) {
+ If(And(PDC0, 0x08)) {
+ Notify (\_PR_.CP00, 0x80) // _PPC
+
+ If (And(PDC0, 0x10)) {
+ Sleep(100)
+ Notify(\_PR_.CP00, 0x81) // _CST
+ }
+ }
+
+ If(And(PDC1, 0x08)) {
+ Notify (\_PR_.CP01, 0x80) // _PPC
+ If (And(PDC1, 0x10)) {
+ Sleep(100)
+ Notify(\_PR_.CP01, 0x81) // _CST
+ }
+ }
+
+ } Else { // UP
+ Notify (\_PR_.CP00, 0x80)
+ Sleep(0x64)
+ Notify(\_PR_.CP00, 0x81)
+ }
+}