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-rw-r--r--src/cpu/intel/common/common.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h
index dd8c2b8a27..fdacd1f74b 100644
--- a/src/cpu/intel/common/common.h
+++ b/src/cpu/intel/common/common.h
@@ -33,10 +33,16 @@ bool intel_ht_sibling(void);
*/
void set_aesni_lock(void);
+/* Enable local CPU APIC TPR (Task Priority Register) updates */
void enable_lapic_tpr(void);
+/* Enable DCA (Direct Cache Access) */
void configure_dca_cap(void);
+/*
+ * Set EPB (Energy Performance Bias)
+ * Possible values are 0 (performance) to 15 (powersave).
+ */
void set_energy_perf_bias(u8 policy);
#endif