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-rw-r--r--src/cpu/amd/agesa/family10/model_10_init.c2
-rw-r--r--src/cpu/amd/agesa/family12/model_12_init.c2
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c2
-rw-r--r--src/cpu/amd/agesa/family15/model_15_init.c2
-rw-r--r--src/cpu/amd/agesa/family15rl/model_15_init.c2
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c2
-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c2
-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.c2
-rw-r--r--src/cpu/amd/family_10h-family_15h/model_10xxx_init.c2
-rw-r--r--src/cpu/amd/geode_gx2/geode_gx2_init.c2
-rw-r--r--src/cpu/amd/geode_lx/cpubug.c2
-rw-r--r--src/cpu/amd/geode_lx/geode_lx_init.c2
-rw-r--r--src/cpu/amd/model_fxx/fidvid.c2
-rw-r--r--src/cpu/amd/model_fxx/init_cpus.c4
-rw-r--r--src/cpu/amd/model_fxx/model_fxx_init.c8
-rw-r--r--src/cpu/amd/pi/00630F01/model_15_init.c2
-rw-r--r--src/cpu/amd/pi/00660F01/model_15_init.c2
-rw-r--r--src/cpu/amd/pi/00730F01/model_16_init.c2
18 files changed, 22 insertions, 22 deletions
diff --git a/src/cpu/amd/agesa/family10/model_10_init.c b/src/cpu/amd/agesa/family10/model_10_init.c
index 12dab914c3..22a92e1e3c 100644
--- a/src/cpu/amd/agesa/family10/model_10_init.c
+++ b/src/cpu/amd/agesa/family10/model_10_init.c
@@ -57,7 +57,7 @@ static void model_10_init(device_t dev)
enable_cache();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c
index 8fdd62cb5e..a0b9479fea 100644
--- a/src/cpu/amd/agesa/family12/model_12_init.c
+++ b/src/cpu/amd/agesa/family12/model_12_init.c
@@ -62,7 +62,7 @@ static void model_12_init(device_t dev)
enable_cache();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 159ea02d55..84ce755501 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -82,7 +82,7 @@ static void model_14_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
diff --git a/src/cpu/amd/agesa/family15/model_15_init.c b/src/cpu/amd/agesa/family15/model_15_init.c
index d035f5ea45..525959f576 100644
--- a/src/cpu/amd/agesa/family15/model_15_init.c
+++ b/src/cpu/amd/agesa/family15/model_15_init.c
@@ -67,7 +67,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
diff --git a/src/cpu/amd/agesa/family15rl/model_15_init.c b/src/cpu/amd/agesa/family15rl/model_15_init.c
index 2c71d3e461..0492be347b 100644
--- a/src/cpu/amd/agesa/family15rl/model_15_init.c
+++ b/src/cpu/amd/agesa/family15rl/model_15_init.c
@@ -81,7 +81,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 77357e93d5..27aedafd7b 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -80,7 +80,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index bf7e3bfb21..3d3afec326 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -79,7 +79,7 @@ static void model_16_init(device_t dev)
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 0edded2b8c..6fefc3bad0 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -257,7 +257,7 @@ uint32_t wait_cpu_state(uint32_t apicid, uint32_t state, uint32_t state2)
continue;
if ((readback & 0x3f) == state || (readback & 0x3f) == state2 || (readback & 0x3f) == F10_APSTATE_RESET) {
timeout = 0;
- break; //target cpu is in stage started
+ break; //target CPU is in stage started
}
}
if (timeout) {
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index 153fb10fff..a41374d8ed 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -133,7 +133,7 @@ static void model_10xxx_init(device_t dev)
enable_cache();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */
diff --git a/src/cpu/amd/geode_gx2/geode_gx2_init.c b/src/cpu/amd/geode_gx2/geode_gx2_init.c
index b8f56db461..b6bad4d068 100644
--- a/src/cpu/amd/geode_gx2/geode_gx2_init.c
+++ b/src/cpu/amd/geode_gx2/geode_gx2_init.c
@@ -22,7 +22,7 @@ static void geode_gx2_init(device_t dev)
/* Turn on caching if we haven't already */
x86_enable_cache();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
//setup_lapic();
vsm_end_post_smi();
diff --git a/src/cpu/amd/geode_lx/cpubug.c b/src/cpu/amd/geode_lx/cpubug.c
index 6638a83173..cf8c2e26e5 100644
--- a/src/cpu/amd/geode_lx/cpubug.c
+++ b/src/cpu/amd/geode_lx/cpubug.c
@@ -75,7 +75,7 @@ static void disablememoryreadorder(void)
wrmsr(MC_CF8F_DATA, msr);
}
-/* For cpu version C3. Should be the only released version */
+/* For CPU version C3. Should be the only released version */
void cpubug(void)
{
pcideadlock();
diff --git a/src/cpu/amd/geode_lx/geode_lx_init.c b/src/cpu/amd/geode_lx/geode_lx_init.c
index 5cda46b55f..335caa3c4a 100644
--- a/src/cpu/amd/geode_lx/geode_lx_init.c
+++ b/src/cpu/amd/geode_lx/geode_lx_init.c
@@ -40,7 +40,7 @@ static void geode_lx_init(device_t dev)
/* Turn on caching if we haven't already */
x86_enable_cache();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
//setup_lapic();
// do VSA late init
diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index 03415d1b89..9e6dfa06a4 100644
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -401,7 +401,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
0)
continue;
if (((readback >> 24) & 0xff) == apicid)
- break; /* it is this cpu turn */
+ break; /* it is this CPU turn */
}
if (loop > 0) {
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c
index 51e1b7c849..2ea4fb9424 100644
--- a/src/cpu/amd/model_fxx/init_cpus.c
+++ b/src/cpu/amd/model_fxx/init_cpus.c
@@ -157,7 +157,7 @@ static u32 wait_cpu_state(u32 apicid, u32 state)
continue;
if ((readback & 0xff) == state) {
timeout = 0;
- break; //target cpu is in stage started
+ break; //target CPU is in stage started
}
}
if (timeout) {
@@ -303,7 +303,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
// start_other_core(id.nodeid); // start second core in first cpu, only allowed for nb_cfg_54 is not set
}
//here don't need to wait
- lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the cpu is started
+ lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the CPU is started
if (apicid != bsp_apicid) {
u32 timeout = 1;
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index cf0b08a04c..e22eae4150 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -249,15 +249,15 @@ static void init_ecc_memory(unsigned node_id)
f1_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 1));
if (!f1_dev) {
- die("Cannot find cpu function 1\n");
+ die("Cannot find CPU function 1\n");
}
f2_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 2));
if (!f2_dev) {
- die("Cannot find cpu function 2\n");
+ die("Cannot find CPU function 2\n");
}
f3_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 3));
if (!f3_dev) {
- die("Cannot find cpu function 3\n");
+ die("Cannot find CPU function 3\n");
}
/* See if we scrubbing should be enabled */
@@ -508,7 +508,7 @@ static void model_fxx_init(device_t dev)
/* Set the processor name string */
init_processor_name();
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS
diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c
index 42afae399d..7c4d1712b5 100644
--- a/src/cpu/amd/pi/00630F01/model_15_init.c
+++ b/src/cpu/amd/pi/00630F01/model_15_init.c
@@ -79,7 +79,7 @@ static void model_15_init(device_t dev)
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c
index 8fe6340baf..de7ee384fc 100644
--- a/src/cpu/amd/pi/00660F01/model_15_init.c
+++ b/src/cpu/amd/pi/00660F01/model_15_init.c
@@ -94,7 +94,7 @@ static void model_15_init(device_t dev)
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index 00a21e962d..6cb3009673 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -77,7 +77,7 @@ static void model_16_init(device_t dev)
}
- /* Enable the local cpu apics */
+ /* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS