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-rw-r--r--src/cpu/amd/model_10xxx/defaults.h48
-rw-r--r--src/cpu/amd/model_10xxx/model_10xxx_init.c1
-rw-r--r--src/cpu/amd/quadcore/quadcore.c13
3 files changed, 33 insertions, 29 deletions
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
index 65290089f1..b1b245a2d8 100644
--- a/src/cpu/amd/model_10xxx/defaults.h
+++ b/src/cpu/amd/model_10xxx/defaults.h
@@ -315,44 +315,44 @@ static const struct {
u32 mask;
} fam10_htphy_default[] = {
- /* Errata 344 - Fam10 C2
+ /* Errata 344 - Fam10 C2/D0
* System software should set bit 6 of F4x1[9C, 94, 8C, 84]_x[78:70, 68:60]. */
- { 0x60, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x60, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x61, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x61, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x62, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x62, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x63, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x63, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x64, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x64, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x65, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x65, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x66, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x66, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x67, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x67, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x68, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x68, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x70, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x70, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x71, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x71, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x72, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x72, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x73, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x73, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x74, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x74, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x75, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x75, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x76, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x76, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x77, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x77, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- { 0x78, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x78, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
/* Errata 354 - Fam10 C2
@@ -395,20 +395,20 @@ static const struct {
{ 0x58, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
- /* Errata 327 - Fam10 C2
+ /* Errata 327 - Fam10 C2/D0
* BIOS should set the Link Phy Impedance Register[RttCtl]
* (F4x1[9C, 94, 8C, 84]_x[D0, C0][31:29]) to 010b and
* Link Phy Impedance Register[RttIndex]
* (F4x1[9C, 94, 8C, 84]_x[D0, C0][20:16]) to 00100b */
- { 0xC0, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0xC0, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x40040000, 0xe01F0000 },
- { 0xD0, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0xD0, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x40040000, 0xe01F0000 },
- { 0x520A, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x520A, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00004000, 0x00006000 }, /* HT_PHY_DLL_REG */
- { 0x530A, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
+ { 0x530A, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00004000, 0x00006000 }, /* HT_PHY_DLL_REG */
{ 0x520A, AMD_DR_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 0b54d44459..daf3eceaa4 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -146,6 +146,7 @@ static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, 0x100F42 }, /* RB-C2 */
{ X86_VENDOR_AMD, 0x100F52 }, /* BL-C2 */
{ X86_VENDOR_AMD, 0x100F62 }, /* DA-C2 */
+ { X86_VENDOR_AMD, 0x100F80 }, /* HY-D0 */
{ 0, 0 },
};
static struct cpu_driver model_10xxx __cpu_driver = {
diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c
index ac62981723..7d621c5375 100644
--- a/src/cpu/amd/quadcore/quadcore.c
+++ b/src/cpu/amd/quadcore/quadcore.c
@@ -29,7 +29,11 @@ static u32 get_core_num_in_bsp(u32 nodeid)
u32 dword;
dword = pci_read_config32(NODE_PCI(nodeid, 3), 0xe8);
dword >>= 12;
- dword &= 3;
+ /* Bit 15 is CmpCap[2] since Revision D. */
+ if ((cpuid_ecx(0x80000008) & 0xff) > 3)
+ dword = ((dword & 8) >> 1) | (dword & 3);
+ else
+ dword &= 3;
return dword;
}
@@ -53,7 +57,7 @@ static void set_apicid_cpuid_lo(void) { }
static void real_start_other_core(u32 nodeid, u32 cores)
{
- u32 dword;
+ u32 dword, i;
printk_debug("Start other core - nodeid: %02x cores: %02x\n", nodeid, cores);
@@ -69,9 +73,8 @@ static void real_start_other_core(u32 nodeid, u32 cores)
if(cores > 1) {
dword = pci_read_config32(NODE_PCI(nodeid, 0), 0x168);
- dword |= (1 << 0); // core2
- if(cores > 2) { // core3
- dword |= (1 << 1);
+ for (i = 0; i < cores - 1; i++) {
+ dword |= 1 << i;
}
pci_write_config32(NODE_PCI(nodeid, 0), 0x168, dword);
}