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Diffstat (limited to 'src/cpu/amd/quadcore/amd_sibling.c')
-rw-r--r--src/cpu/amd/quadcore/amd_sibling.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c
index ec5744bdce..c4eb50cd2c 100644
--- a/src/cpu/amd/quadcore/amd_sibling.c
+++ b/src/cpu/amd/quadcore/amd_sibling.c
@@ -41,11 +41,11 @@ static u32 get_max_siblings(u32 nodes)
u32 siblings=0;
//get max siblings from all the nodes
- for(nodeid=0; nodeid<nodes; nodeid++){
+ for (nodeid=0; nodeid<nodes; nodeid++){
int j;
dev = get_node_pci(nodeid, 3);
j = (pci_read_config32(dev, 0xe8) >> 12) & 3;
- if(siblings < j) {
+ if (siblings < j) {
siblings = j;
}
}
@@ -60,7 +60,7 @@ static void enable_apic_ext_id(u32 nodes)
u32 nodeid;
//enable APIC_EXIT_ID all the nodes
- for(nodeid=0; nodeid<nodes; nodeid++){
+ for (nodeid=0; nodeid<nodes; nodeid++){
u32 val;
dev = get_node_pci(nodeid, 0);
val = pci_read_config32(dev, 0x68);
@@ -82,7 +82,7 @@ u32 get_apicid_base(u32 ioapic_num)
siblings = get_max_siblings(sysconf.nodes);
- if(sysconf.bsp_apicid > 0) { // IOAPIC could start from 0
+ if (sysconf.bsp_apicid > 0) { // IOAPIC could start from 0
return 0;
} else if (sysconf.enabled_apic_ext_id) { // enabled ext id but bsp = 0
return 1;
@@ -93,7 +93,7 @@ u32 get_apicid_base(u32 ioapic_num)
//Construct apicid_base
- if((!disable_siblings) && (siblings>0) ) {
+ if ((!disable_siblings) && (siblings>0) ) {
/* for 8 way dual core, we will used up apicid 16:16, actually
16 is not allowed by current kernel and the kernel will try
to get one that is small than 16 to make IOAPIC work. I don't
@@ -108,7 +108,7 @@ u32 get_apicid_base(u32 ioapic_num)
apicid_base = sysconf.nodes;
}
- if((apicid_base+ioapic_num-1)>0xf) {
+ if ((apicid_base+ioapic_num-1)>0xf) {
// We need to enable APIC EXT ID
printk(BIOS_SPEW, "if the IOAPIC device doesn't support 256 APIC id,\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for IOAPIC\n");
enable_apic_ext_id(sysconf.nodes);