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Diffstat (limited to 'src/cpu/amd/pi/00630F01/model_15_init.c')
-rw-r--r--src/cpu/amd/pi/00630F01/model_15_init.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c
index 925c60c100..c2f2e9d39e 100644
--- a/src/cpu/amd/pi/00630F01/model_15_init.c
+++ b/src/cpu/amd/pi/00630F01/model_15_init.c
@@ -43,21 +43,24 @@ static void model_15_init(device_t dev)
u32 siblings;
#endif
- disable_cache ();
+ disable_cache();
/* Enable access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);
msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
msr.lo &= ~SYSCFG_MSR_MtrrFixDramEn;
wrmsr(SYSCFG_MSR, msr);
- // BSP: make a0000-bffff UC, c0000-fffff WB, same as OntarioApMtrrSettingsList for APs
+ /*
+ * BSP: make a0000-bffff UC, c0000-fffff WB,
+ * same as OntarioApMtrrSettingsList for APs
+ */
msr.lo = msr.hi = 0;
- wrmsr (0x259, msr);
+ wrmsr(0x259, msr);
msr.lo = msr.hi = 0x1e1e1e1e;
wrmsr(0x250, msr);
wrmsr(0x258, msr);
for (msrno = 0x268; msrno <= 0x26f; msrno++)
- wrmsr (msrno, msr);
+ wrmsr(msrno, msr);
msr = rdmsr(SYSCFG_MSR);
msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn;
@@ -70,10 +73,8 @@ static void model_15_init(device_t dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++)
wrmsr(MCI_STATUS + (i * 4), msr);
- }
-
/* Enable the local CPU APICs */
setup_lapic();