diff options
Diffstat (limited to 'src/cpu/amd/model_10xxx/mc_patch_010000db.h')
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000db.h | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/mc_patch_010000db.h b/src/cpu/amd/model_10xxx/mc_patch_010000db.h new file mode 100644 index 0000000000..c32c5d2bc5 --- /dev/null +++ b/src/cpu/amd/model_10xxx/mc_patch_010000db.h @@ -0,0 +1,164 @@ +/* + ============================================================ + (c) Advanced Micro Devices, Inc., 2004-2011 + + The enclosed microcode is intended to be used with AMD + Microprocessors. You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +// 1041h + +0x11, 0x20, 0x24, 0x10, 0xDB, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0xB9, 0xE4, 0xBE, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x41, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xA0, 0x09, 0x00, 0x00, +0xA5, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xA1, 0x09, 0x00, 0x00, +0xFF, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +0xFF, 0xFF, 0xFF, 0xFF, 0x97, 0xD1, 0x7F, 0x00, 0x83, 0x3F, 0x36, 0xC0, +0xA0, 0x1B, 0xF8, 0x13, 0x0E, 0xBF, 0x0C, 0xB4, 0xF2, 0x1F, 0xF8, 0xA7, +0x3C, 0xFC, 0x03, 0xFC, 0x40, 0x03, 0x54, 0x00, 0x92, 0xFF, 0xE0, 0xBF, +0xE7, 0xE1, 0x1F, 0xE0, 0x5F, 0x9E, 0xFA, 0xFF, 0x9F, 0x87, 0x7F, 0x80, +0x03, 0xF8, 0xFF, 0xC6, 0x01, 0x0E, 0xFC, 0xBD, 0x00, 0xA0, 0x2A, 0x69, +0x0E, 0x40, 0xBD, 0x55, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x00, 0xE0, 0xFF, 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