aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/amd/car/post_cache_as_ram.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/amd/car/post_cache_as_ram.c')
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 064222a454..c647254c70 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -26,9 +26,17 @@
#include <cpu/amd/msr.h>
#include <arch/acpi.h>
#include <romstage_handoff.h>
-#include "cbmem.h"
+#include <cbmem.h>
+
#include "cpu/amd/car/disable_cache_as_ram.c"
+// For set_sysinfo_in_ram()
+#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
+#include "northbridge/amd/amdk8/raminit.h"
+#else
+#include "northbridge/amd/amdfam10/raminit.h"
+#endif
+
#if CONFIG_RAMTOP <= 0x100000
#error "You need to set CONFIG_RAMTOP greater than 1M"
#endif
@@ -171,7 +179,7 @@ void post_cache_as_ram(void)
void cache_as_ram_new_stack(void)
{
print_car_debug("Disabling cache as RAM now\n");
- disable_cache_as_ram_bsp();
+ disable_cache_as_ram_real(0); // inline
disable_cache();
/* Enable cached access to RAM in the range 0M to CACHE_TMP_RAMTOP */