diff options
Diffstat (limited to 'src/cpu/amd/agesa')
| -rw-r--r-- | src/cpu/amd/agesa/Kconfig | 4 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/romstage.c | 31 |
3 files changed, 34 insertions, 3 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index cd14975031..e43d4b0515 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -37,6 +37,10 @@ if CPU_AMD_AGESA config AGESA_LEGACY def_bool n +config AGESA_LEGACY_WRAPPER + bool + default AGESA_LEGACY + config AGESA_NO_LEGACY bool default !AGESA_LEGACY diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index 19f79756dc..b5bb8d98a8 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -32,7 +32,7 @@ endif romstage-y += heapmanager.c ramstage-y += heapmanager.c -ramstage-y += amd_late_init.c +ramstage-$(CONFIG_AGESA_LEGACY_WRAPPER) += amd_late_init.c ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) diff --git a/src/cpu/amd/agesa/romstage.c b/src/cpu/amd/agesa/romstage.c index 11a62ad302..4422b66bb2 100644 --- a/src/cpu/amd/agesa/romstage.c +++ b/src/cpu/amd/agesa/romstage.c @@ -32,6 +32,9 @@ static void fill_sysinfo(struct sysinfo *cb) { memset(cb, 0, sizeof(*cb)); cb->s3resume = acpi_is_wakeup_s3(); + + if (!HAS_LEGACY_WRAPPER) + agesa_set_interface(cb); } void * asmlinkage romstage_main(unsigned long bist) @@ -55,7 +58,22 @@ void * asmlinkage romstage_main(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - agesa_main(cb); + if (!HAS_LEGACY_WRAPPER) { + + agesa_execute_state(cb, AMD_INIT_RESET); + + agesa_execute_state(cb, AMD_INIT_EARLY); + + if (!cb->s3resume) + agesa_execute_state(cb, AMD_INIT_POST); + else + agesa_execute_state(cb, AMD_INIT_RESUME); + + } else { + + agesa_main(cb); + + } uintptr_t stack_top = CACHE_TMP_RAMTOP; if (cb->s3resume) { @@ -80,7 +98,16 @@ void asmlinkage romstage_after_car(void) printk(BIOS_DEBUG, "CAR disabled.\n"); fill_sysinfo(cb); - agesa_postcar(cb); + + if (!HAS_LEGACY_WRAPPER) { + if (!cb->s3resume) + agesa_execute_state(cb, AMD_INIT_ENV); + else + agesa_execute_state(cb, AMD_S3LATE_RESTORE); + } else { + + agesa_postcar(cb); + } if (cb->s3resume) set_resume_cache(); |