diff options
Diffstat (limited to 'src/cpu/amd/agesa/family15tn/romstage.c')
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/romstage.c | 56 |
1 files changed, 16 insertions, 40 deletions
diff --git a/src/cpu/amd/agesa/family15tn/romstage.c b/src/cpu/amd/agesa/family15tn/romstage.c index cc40b2393c..55bb4b1f23 100644 --- a/src/cpu/amd/agesa/family15tn/romstage.c +++ b/src/cpu/amd/agesa/family15tn/romstage.c @@ -3,6 +3,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2012 Advanced Micro Devices, Inc. + * Copyright (C) 2017 Kyösti Mälkki * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,63 +15,36 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/agesawrapper.h> -#include <northbridge/amd/agesa/agesa_helper.h> -#include <northbridge/amd/agesa/state_machine.h> - -#include <arch/acpi.h> -#include <arch/cpu.h> -#include <arch/io.h> #include <arch/stages.h> -#include <cbmem.h> -#include <console/console.h> #include <cpu/amd/agesa/s3_resume.h> -#include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> + +#include <console/console.h> #include <cpu/amd/car.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <stdint.h> -#include <string.h> -#include <southbridge/amd/agesa/hudson/hudson.h> + +#include <northbridge/amd/agesa/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> +#include <northbridge/amd/agesa/agesa_helper.h> + void asmlinkage early_all_cores(void) { amd_initmmio(); } -void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) +void platform_once(struct sysinfo *cb) { - struct sysinfo *cb = NULL; - u32 val; - - if (!cpu_init_detectedx && boot_cpu()) { - post_code(0x30); - - post_code(0x31); - - board_BeforeAgesa(cb); - - console_init(); - } - - /* Halt if there was a built in self test failure */ - post_code(0x34); - report_bist_failure(bist); - - /* Load MPB */ - val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); + board_BeforeAgesa(cb); +} +void agesa_main(struct sysinfo *cb) +{ post_code(0x37); agesawrapper_amdinitreset(); post_code(0x39); agesawrapper_amdinitearly(); - int s3resume = acpi_is_wakeup_s3(); - if (!s3resume) { + if (!cb->s3resume) { post_code(0x40); agesawrapper_amdinitpost(); @@ -93,4 +67,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x50); copy_and_run(); + + /* Not reached */ } |