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Diffstat (limited to 'src/cpu/amd/agesa/family15tn/romstage.c')
-rw-r--r--src/cpu/amd/agesa/family15tn/romstage.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/family15tn/romstage.c b/src/cpu/amd/agesa/family15tn/romstage.c
index fbb70adbb3..cc40b2393c 100644
--- a/src/cpu/amd/agesa/family15tn/romstage.c
+++ b/src/cpu/amd/agesa/family15tn/romstage.c
@@ -34,13 +34,16 @@
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
+void asmlinkage early_all_cores(void)
+{
+ amd_initmmio();
+}
+
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
struct sysinfo *cb = NULL;
u32 val;
- amd_initmmio();
-
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);