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path: root/src/cpu/amd/agesa/family15tn/model_15_init.c
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Diffstat (limited to 'src/cpu/amd/agesa/family15tn/model_15_init.c')
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index e0bff4f4e3..5f2c60343e 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -46,7 +46,7 @@ static void model_15_init(device_t dev)
//x86_enable_cache();
//amd_setup_mtrrs();
//x86_mtrr_check();
- disable_cache ();
+ disable_cache();
/* Enable access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);
msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;