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Diffstat (limited to 'src/config/coreboot_apc.ld')
-rw-r--r--src/config/coreboot_apc.ld6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/config/coreboot_apc.ld b/src/config/coreboot_apc.ld
index 9bca028ca1..d7820aafe1 100644
--- a/src/config/coreboot_apc.ld
+++ b/src/config/coreboot_apc.ld
@@ -1,7 +1,7 @@
/*
* Memory map:
*
- * DCACHE_RAM_BASE
+ * CONFIG_DCACHE_RAM_BASE
* : data segment
* : bss segment
* : heap
@@ -28,7 +28,7 @@ ENTRY(_start)
SECTIONS
{
- . = DCACHE_RAM_BASE;
+ . = CONFIG_DCACHE_RAM_BASE;
/*
* First we place the code and read only data (typically const declared).
* This get placed in rom.
@@ -90,7 +90,7 @@ SECTIONS
_ram_seg = _text;
_eram_seg = _eheap;
- _bogus = ASSERT( ( _eram_seg <= ((DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE))) , "coreboot_apc is too big");
+ _bogus = ASSERT( ( _eram_seg <= ((CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE))) , "coreboot_apc is too big");
/DISCARD/ : {
*(.comment)