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-rw-r--r--src/commonlib/include/commonlib/cbmem_id.h1
-rw-r--r--src/commonlib/include/commonlib/coreboot_tables.h17
2 files changed, 18 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h
index ac271a06bc..6b4d60469e 100644
--- a/src/commonlib/include/commonlib/cbmem_id.h
+++ b/src/commonlib/include/commonlib/cbmem_id.h
@@ -68,6 +68,7 @@
#define CBMEM_ID_ROM3 0x524f4d33
#define CBMEM_ID_FMAP 0x464d4150
#define CBMEM_ID_FSP_LOGO 0x4c4f474f
+#define CBMEM_ID_SMM_COMBUFFER 0x53534d32
#define CBMEM_ID_TO_NAME_TABLE \
{ CBMEM_ID_ACPI, "ACPI " }, \
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index 6393c01e6e..44060025b3 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -80,6 +80,7 @@ enum {
LB_TAG_TCPA_LOG = 0x0036,
LB_TAG_FMAP = 0x0037,
LB_TAG_PLATFORM_BLOB_VERSION = 0x0038,
+ LB_TAG_SMMSTOREV2 = 0x0039,
LB_TAG_CMOS_OPTION_TABLE = 0x00c8,
LB_TAG_OPTION = 0x00c9,
LB_TAG_OPTION_ENUM = 0x00ca,
@@ -484,4 +485,20 @@ struct cmos_checksum {
#define CHECKSUM_PCBIOS 1
};
+/* SMMSTOREv2 record
+ * This record contains information to use SMMSTOREv2.
+ */
+
+struct lb_smmstorev2 {
+ uint32_t tag;
+ uint32_t size;
+ uint32_t num_blocks; /* Number of writeable blocks in SMM */
+ uint32_t block_size; /* Size of a block in byte. Default: 64 KiB */
+ uint32_t mmap_addr; /* MMIO address of the store for read only access */
+ uint32_t com_buffer; /* Physical address of the communication buffer */
+ uint32_t com_buffer_size; /* Size of the communication buffer in bytes */
+ uint8_t apm_cmd; /* The command byte to write to the APM I/O port */
+ uint8_t unused[3]; /* Set to zero */
+};
+
#endif