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-rw-r--r--src/arch/x86/cpu.c26
-rw-r--r--src/arch/x86/include/arch/cpu.h21
2 files changed, 8 insertions, 39 deletions
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index 9fc52330dc..face248fc2 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -318,33 +318,9 @@ void arch_bootstate_coreboot_exit(void)
mp_park_aps();
}
-/*
- * Previously cpu_index() implementation assumes that cpu_index()
- * function will always getting called from coreboot context
- * (ESP stack pointer will always refer to coreboot).
- *
- * But with MP_SERVICES_PPI implementation in coreboot this
- * assumption might not be true, where FSP context (stack pointer refers
- * to FSP) will request to get cpu_index().
- *
- * Hence new logic to use cpuid to fetch lapic id and matches with
- * cpus_default_apic_id[] variable to return correct cpu_index().
- */
-int cpu_index(void)
-{
- int i;
- int lapic_id = initial_lapicid();
-
- for (i = 0; i < CONFIG_MAX_CPUS; i++) {
- if (cpu_get_apic_id(i) == lapic_id)
- return i;
- }
- return -1;
-}
-
/* cpu_info() looks at address 0 at the base of %gs for a pointer to struct cpu_info */
static struct per_cpu_segment_data segment_data[CONFIG_MAX_CPUS];
-static struct cpu_info cpu_infos[CONFIG_MAX_CPUS];
+struct cpu_info cpu_infos[CONFIG_MAX_CPUS];
enum cb_err set_cpu_info(unsigned int index, struct device *cpu)
{
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index c7c6b4e074..18bc961828 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -161,6 +161,13 @@ static inline struct cpu_info *cpu_info(void)
return ci;
}
+static inline unsigned long cpu_index(void)
+{
+ struct cpu_info *ci;
+ ci = cpu_info();
+ return ci->index;
+}
+
struct cpuinfo_x86 {
uint8_t x86; /* CPU family */
uint8_t x86_vendor; /* CPU vendor */
@@ -212,20 +219,6 @@ uint32_t cpu_get_feature_flags_ecx(void);
*/
uint32_t cpu_get_feature_flags_edx(void);
-/*
- * Previously cpu_index() implementation assumes that cpu_index()
- * function will always getting called from coreboot context
- * (ESP stack pointer will always refer to coreboot).
- *
- * But with MP_SERVICES_PPI implementation in coreboot this
- * assumption might not be true, where FSP context (stack pointer refers
- * to FSP) will request to get cpu_index().
- *
- * Hence new logic to use cpuid to fetch lapic id and matches with
- * cpus_default_apic_id[] variable to return correct cpu_index().
- */
-int cpu_index(void);
-
#define DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA 0x04
#define DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD 0x8000001d