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-rw-r--r--src/arch/arm64/Makefile.inc1
-rw-r--r--src/arch/mips/Makefile.inc1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index 13e84159a2..f1d0cb3e66 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -88,7 +88,6 @@ $(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $$(verstage-objs)
@printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --whole-archive --start-group $(objgenerated)/libverstage.a $$(verstage-objs) --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
-verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
verstage-y += boot.c
verstage-y += div0.c
verstage-y += eabi_compat.c
diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc
index cff0151406..e3aff0c7d7 100644
--- a/src/arch/mips/Makefile.inc
+++ b/src/arch/mips/Makefile.inc
@@ -61,7 +61,6 @@ endif # CONFIG_ARCH_BOOTBLOCK_MIPS
ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y)
romstage-y += boot.c
-romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
romstage-y += cache.c
romstage-y += mmu.c
romstage-y += stages.c