diff options
Diffstat (limited to 'src/arch')
| -rwxr-xr-x | src/arch/x86/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/arch/x86/init/bootblock.ld | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index fc3cd14fba..d378a20c14 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -272,7 +272,7 @@ $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL) rm -f $@ cp $(obj)/coreboot.pre1 $@ $(CBFSTOOL) $@ add-stage $(obj)/romstage.elf \ - $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt) + $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt) #FIXME: location.txt might require an offset of header size ####################################################################### diff --git a/src/arch/x86/init/bootblock.ld b/src/arch/x86/init/bootblock.ld index 27d718fcbc..ca4e820217 100644 --- a/src/arch/x86/init/bootblock.ld +++ b/src/arch/x86/init/bootblock.ld @@ -46,5 +46,12 @@ SECTIONS *(.eh_frame); } + . = CONFIG_DCACHE_RAM_BASE; + .car.data . (NOLOAD) : { + *(.car.global_data); + *(.car.cbmem_console); + } + + _bogus = ASSERT((SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full"); _bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0 || CONFIG_CPU_AMD_AGESA, "Do not use global variables in romstage"); } |