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-rw-r--r--src/arch/armv7/boot/coreboot_table.c2
-rw-r--r--src/arch/armv7/include/arch/coreboot_tables.h3
-rw-r--r--src/arch/x86/boot/coreboot_table.c24
-rw-r--r--src/arch/x86/boot/tables.c2
-rw-r--r--src/arch/x86/include/arch/coreboot_tables.h3
5 files changed, 26 insertions, 8 deletions
diff --git a/src/arch/armv7/boot/coreboot_table.c b/src/arch/armv7/boot/coreboot_table.c
index 47aad3601b..e5aa6ed4c5 100644
--- a/src/arch/armv7/boot/coreboot_table.c
+++ b/src/arch/armv7/boot/coreboot_table.c
@@ -484,7 +484,7 @@ static void lb_remove_memory_range(struct lb_memory *mem,
}
}
-static void lb_add_memory_range(struct lb_memory *mem,
+void lb_add_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size)
{
lb_remove_memory_range(mem, start, size);
diff --git a/src/arch/armv7/include/arch/coreboot_tables.h b/src/arch/armv7/include/arch/coreboot_tables.h
index 4c2a01312d..c5eacf8020 100644
--- a/src/arch/armv7/include/arch/coreboot_tables.h
+++ b/src/arch/armv7/include/arch/coreboot_tables.h
@@ -12,6 +12,9 @@ unsigned long write_coreboot_table(
void lb_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size);
+void lb_add_memory_range(struct lb_memory *mem,
+ uint32_t type, uint64_t start, uint64_t size);
+
void fill_lb_gpios(struct lb_gpios *gpios);
/* Routines to extract part so the coreboot table or information
diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c
index 463f723097..617fab29cc 100644
--- a/src/arch/x86/boot/coreboot_table.c
+++ b/src/arch/x86/boot/coreboot_table.c
@@ -355,6 +355,9 @@ static void lb_memory_range(struct lb_memory *mem,
static void lb_reserve_table_memory(struct lb_header *head)
{
+/* Dynamic cbmem has already reserved the memory where the coreboot tables
+ * reside. Therefore, there is nothing to fix up. */
+#if !CONFIG_DYNAMIC_CBMEM
struct lb_record *last_rec;
struct lb_memory *mem;
uint64_t start;
@@ -383,6 +386,7 @@ static void lb_reserve_table_memory(struct lb_header *head)
mem->map[i].size = pack_lb64(map_end - end);
}
}
+#endif
}
static unsigned long lb_table_fini(struct lb_header *head, int fixup)
@@ -507,7 +511,7 @@ static void lb_remove_memory_range(struct lb_memory *mem,
}
}
-static void lb_add_memory_range(struct lb_memory *mem,
+void lb_add_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size)
{
lb_remove_memory_range(mem, start, size);
@@ -664,14 +668,20 @@ unsigned long write_coreboot_table(
lb_add_memory_range(mem, LB_MEM_TABLE,
low_table_start, low_table_end - low_table_start);
- /* Record the pirq table, acpi tables, and maybe the mptable */
- lb_add_memory_range(mem, LB_MEM_TABLE,
- rom_table_start, rom_table_end-rom_table_start);
-
- printk(BIOS_DEBUG, "Adding high table area\n");
- // should this be LB_MEM_ACPI?
+ /* Record the pirq table, acpi tables, and maybe the mptable. However,
+ * these only need to be added when the rom_table is sitting below
+ * 1MiB. If it isn't that means high tables are being written.
+ * The code below handles high tables correctly. */
+ if (rom_table_end <= (1 << 20))
+ lb_add_memory_range(mem, LB_MEM_TABLE,
+ rom_table_start, rom_table_end-rom_table_start);
+
+#if CONFIG_DYNAMIC_CBMEM
+ cbmem_add_lb_mem(mem);
+#else /* CONFIG_DYNAMIC_CBMEM */
lb_add_memory_range(mem, LB_MEM_TABLE,
high_tables_base, high_tables_size);
+#endif /* CONFIG_DYNAMIC_CBMEM */
/* Add reserved regions */
add_lb_reserved(mem);
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 294a10c46c..d842e73f6e 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -53,6 +53,7 @@ struct lb_memory *write_tables(void)
*/
unsigned long high_table_pointer;
+#if !CONFIG_DYNAMIC_CBMEM
if (!high_tables_base) {
printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n");
// Are there any boards without?
@@ -60,6 +61,7 @@ struct lb_memory *write_tables(void)
}
printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
+#endif
rom_table_start = 0xf0000;
rom_table_end = 0xf0000;
diff --git a/src/arch/x86/include/arch/coreboot_tables.h b/src/arch/x86/include/arch/coreboot_tables.h
index e9790db17a..a8deeeddb3 100644
--- a/src/arch/x86/include/arch/coreboot_tables.h
+++ b/src/arch/x86/include/arch/coreboot_tables.h
@@ -8,6 +8,9 @@ unsigned long write_coreboot_table(
unsigned long low_table_start, unsigned long low_table_end,
unsigned long rom_table_start, unsigned long rom_table_end);
+void lb_add_memory_range(struct lb_memory *mem,
+ uint32_t type, uint64_t start, uint64_t size);
+
/* Routines to extract part so the coreboot table or information
* from the coreboot table.
*/