diff options
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/arm64/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/arm64/include/arch/stages.h | 7 | ||||
| -rw-r--r-- | src/arch/arm64/romstage.c | 39 |
3 files changed, 47 insertions, 0 deletions
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index e2c44eb479..6bb7196805 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -107,6 +107,7 @@ romstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c romstage-y += memset.S romstage-y += memcpy.S romstage-y += memmove.S +romstage-y += romstage.c romstage-y += transition.c transition_asm.S rmodules_arm64-y += memset.S diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h index 9a88ea7fbe..2d6d583fce 100644 --- a/src/arch/arm64/include/arch/stages.h +++ b/src/arch/arm64/include/arch/stages.h @@ -21,4 +21,11 @@ void stage_entry(void); +/* This function is the romstage platform entry point, and should contain all + chipset and mainboard setup until DRAM is initialized and accessible. */ +void platform_romstage_main(void); +/* This is an optional hook to run further chipset or mainboard code after DRAM + and associated support frameworks (like CBMEM) have been initialized. */ +void platform_romstage_postram(void); + #endif diff --git a/src/arch/arm64/romstage.c b/src/arch/arm64/romstage.c new file mode 100644 index 0000000000..8cdb16baef --- /dev/null +++ b/src/arch/arm64/romstage.c @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/exception.h> +#include <arch/stages.h> +#include <cbmem.h> +#include <console/console.h> +#include <program_loading.h> +#include <timestamp.h> + +__weak void platform_romstage_main(void) { /* no-op, for bring-up */ } +__weak void platform_romstage_postram(void) { /* no-op */ } + +void main(void) +{ + timestamp_add_now(TS_START_ROMSTAGE); + + console_init(); + exception_init(); + + platform_romstage_main(); + cbmem_initialize_empty(); + platform_romstage_postram(); + + run_ramstage(); +} |