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-rw-r--r--src/arch/x86/boot/Makefile.inc2
-rw-r--r--src/arch/x86/boot/smbios.c293
-rw-r--r--src/arch/x86/boot/tables.c24
3 files changed, 318 insertions, 1 deletions
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index d4a377f74b..3f11c01611 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -6,8 +6,10 @@ ramstage-y += tables.c
ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
+ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
$(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
+$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c
new file mode 100644
index 0000000000..e5156d9de7
--- /dev/null
+++ b/src/arch/x86/boot/smbios.c
@@ -0,0 +1,293 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <smbios.h>
+#include <console/console.h>
+#include <build.h>
+#include <device/device.h>
+#include <arch/cpu.h>
+#include <cpu/x86/name.h>
+#include <cbfs_core.h>
+#include <arch/byteorder.h>
+
+static u8 smbios_checksum(u8 *p, u32 length)
+{
+ u8 ret = 0;
+ while (length--)
+ ret += *p++;
+ return -ret;
+}
+
+
+int smbios_add_string(char *start, const char *str)
+{
+ int i = 1;
+ char *p = start;
+
+ for(;;) {
+ if (!*p) {
+ strcpy(p, str);
+ p += strlen(str);
+ *p++ = '\0';
+ *p++ = '\0';
+ return i;
+ }
+
+ if (!strcmp(p, str))
+ return i;
+
+ p += strlen(p)+1;
+ i++;
+ }
+}
+
+int smbios_string_table_len(char *start)
+{
+ char *p = start;
+ int i, len = 0;
+
+ while(*p) {
+ i = strlen(p) + 1;
+ p += i;
+ len += i;
+ }
+ return len + 1;
+}
+
+static int smbios_cpu_vendor(char *start)
+{
+ char tmp[13];
+ u32 *_tmp = (u32 *)tmp;
+ struct cpuid_result res = cpuid(0);
+
+ _tmp[0] = res.ebx;
+ _tmp[1] = res.edx;
+ _tmp[2] = res.ecx;
+ tmp[12] = '\0';
+ return smbios_add_string(start, tmp);
+
+}
+
+static int smbios_processor_name(char *start)
+{
+ char tmp[49];
+ u32 *_tmp = (u32 *)tmp;
+ struct cpuid_result res;
+ int i;
+
+ for (i = 0; i < 3; i++) {
+ res = cpuid(0x80000002 + i);
+ _tmp[i * 4 + 0] = res.eax;
+ _tmp[i * 4 + 1] = res.ebx;
+ _tmp[i * 4 + 2] = res.ecx;
+ _tmp[i * 4 + 3] = res.edx;
+ }
+
+ tmp[48] = 0;
+ return smbios_add_string(start, tmp);
+}
+
+static int smbios_write_type0(unsigned long *current, int handle)
+{
+ struct cbfs_header *hdr;
+ struct smbios_type0 *t = (struct smbios_type0 *)*current;
+ int len = sizeof(struct smbios_type0);
+
+ memset(t, 0, sizeof(struct smbios_type0));
+ t->type = SMBIOS_BIOS_INFORMATION;
+ t->handle = handle;
+ t->length = len - 2;
+
+ t->vendor = smbios_add_string(t->eos, "coreboot");
+ t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
+ t->bios_version = smbios_add_string(t->eos, COREBOOT_VERSION);
+
+ if ((hdr = get_cbfs_header()) != (struct cbfs_header *)0xffffffff)
+ t->bios_rom_size = (ntohl(hdr->romsize) / 65535) - 1;
+ t->system_bios_major_release = 4;
+ t->bios_characteristics =
+ BIOS_CHARACTERISTICS_PCI_SUPPORTED |
+#if CONFIG_CARDBUS_PLUGIN_SUPPORT
+ BIOS_CHARACTERISTICS_PC_CARD |
+#endif
+ BIOS_CHARACTERISTICS_SELECTABLE_BOOT |
+ BIOS_CHARACTERISTICS_UPGRADEABLE;
+
+#if CONFIG_GENERATE_ACPI_TABLES
+ t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI;
+#endif
+ t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET;
+ len = t->length + smbios_string_table_len(t->eos);
+ *current += len;
+ return len;
+}
+
+static int smbios_write_type1(unsigned long *current, int handle)
+{
+ struct smbios_type1 *t = (struct smbios_type1 *)*current;
+ int len = sizeof(struct smbios_type1);
+
+ memset(t, 0, sizeof(struct smbios_type1));
+ t->type = SMBIOS_SYSTEM_INFORMATION;
+ t->handle = handle;
+ t->length = len - 2;
+ t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR);
+ t->product_name = smbios_add_string(t->eos, CONFIG_MAINBOARD_PART_NUMBER);
+ len = t->length + smbios_string_table_len(t->eos);
+ *current += len;
+ return len;
+}
+
+static int smbios_write_type3(unsigned long *current, int handle)
+{
+ struct smbios_type3 *t = (struct smbios_type3 *)*current;
+ int len = sizeof(struct smbios_type3);
+
+ memset(t, 0, sizeof(struct smbios_type3));
+ t->type = SMBIOS_SYSTEM_ENCLOSURE;
+ t->handle = handle;
+ t->length = len - 2;
+ t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR);
+ t->bootup_state = SMBIOS_STATE_SAFE;
+ t->power_supply_state = SMBIOS_STATE_SAFE;
+ t->thermal_state = SMBIOS_STATE_SAFE;
+ t->_type = 3;
+ t->security_status = SMBIOS_STATE_SAFE;
+ len = t->length + smbios_string_table_len(t->eos);
+ *current += len;
+ return len;
+}
+
+static int smbios_write_type4(unsigned long *current, int handle)
+{
+ struct cpuid_result res;
+ struct smbios_type4 *t = (struct smbios_type4 *)*current;
+ int len = sizeof(struct smbios_type4);
+
+ res = cpuid(1);
+
+ memset(t, 0, sizeof(struct smbios_type4));
+ t->type = SMBIOS_PROCESSOR_INFORMATION;
+ t->handle = handle;
+ t->length = len - 2;
+ t->processor_id[0] = res.eax;
+ t->processor_id[1] = res.edx;
+ t->processor_manufacturer = smbios_cpu_vendor(t->eos);
+ t->processor_version = smbios_processor_name(t->eos);
+ t->processor_family = 0x0c;
+ t->processor_type = 3; /* System Processor */
+ t->processor_upgrade = 0x06;
+ t->core_count = (res.ebx >> 16) & 0xff;
+ t->l1_cache_handle = 0xffff;
+ t->l2_cache_handle = 0xffff;
+ t->l3_cache_handle = 0xffff;
+ t->processor_upgrade = 1;
+ len = t->length + smbios_string_table_len(t->eos);
+ *current += len;
+ return len;
+}
+
+static int smbios_write_type32(unsigned long *current, int handle)
+{
+ struct smbios_type32 *t = (struct smbios_type32 *)*current;
+ int len = sizeof(struct smbios_type32);
+
+ memset(t, 0, sizeof(struct smbios_type32));
+ t->type = SMBIOS_SYSTEM_BOOT_INFORMATION;
+ t->handle = handle;
+ t->length = len - 2;
+ *current += len;
+ return len;
+}
+
+static int smbios_write_type127(unsigned long *current, int handle)
+{
+ struct smbios_type127 *t = (struct smbios_type127 *)*current;
+ int len = sizeof(struct smbios_type127);
+
+ memset(t, 0, sizeof(struct smbios_type127));
+ t->type = SMBIOS_END_OF_TABLE;
+ t->handle = handle;
+ t->length = len - 2;
+ *current += len;
+ return len;
+}
+
+static int smbios_walk_device_tree(device_t tree, int *handle, unsigned long *current)
+{
+ device_t dev;
+ int len = 0;
+
+ for(dev = tree; dev; dev = dev->next) {
+ printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev->chip_ops ? dev->chip_ops->name : "");
+
+ if (dev->ops && dev->ops->get_smbios_data)
+ len += dev->ops->get_smbios_data(dev, handle, current);
+
+ if (dev->chip_ops && dev->chip_ops->get_smbios_data)
+ len += dev->chip_ops->get_smbios_data(dev, handle, current);
+ }
+ return len;
+}
+
+unsigned long smbios_write_tables(unsigned long current)
+{
+ struct smbios_entry *se;
+ unsigned long tables;
+ int len, handle = 0;
+
+ current = ALIGN(current, 16);
+ printk(BIOS_DEBUG, "%s: %08lx\n", __func__, current);
+
+ se = (struct smbios_entry *)current;
+ current += sizeof(struct smbios_entry);
+ current = ALIGN(current, 16);
+
+ tables = current;
+ len = smbios_write_type0(&current, handle++);
+ len += smbios_write_type1(&current, handle++);
+ len += smbios_write_type3(&current, handle++);
+ len += smbios_write_type4(&current, handle++);
+ len += smbios_write_type32(&current, handle++);
+
+ len += smbios_walk_device_tree(all_devices, &handle, &current);
+
+ len += smbios_write_type127(&current, handle++);
+
+ memset(se, 0, sizeof(struct smbios_entry));
+ memcpy(se->anchor, "_SM_", 4);
+ se->length = sizeof(struct smbios_entry);
+ se->major_version = 2;
+ se->minor_version = 7;
+ se->max_struct_size = 24;
+ se->struct_count = handle;
+ memcpy(se->intermediate_anchor_string, "_DMI_", 5);
+
+ se->struct_table_address = (u32)tables;
+ se->struct_table_length = len;
+
+ se->intermediate_checksum = smbios_checksum((u8 *)se + 0x10,
+ sizeof(struct smbios_entry) - 0x10);
+ se->checksum = smbios_checksum((u8 *)se, sizeof(struct smbios_entry));
+ return current;
+}
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index d816e76750..29d2ec09b2 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -31,6 +31,7 @@
#include <cpu/x86/multiboot.h>
#include <cbmem.h>
#include <lib.h>
+#include <smbios.h>
uint64_t high_tables_base = 0;
uint64_t high_tables_size;
@@ -120,7 +121,7 @@ struct lb_memory *write_tables(void)
#endif /* CONFIG_GENERATE_MP_TABLE */
#if CONFIG_GENERATE_ACPI_TABLES == 1
-#define MAX_ACPI_SIZE (47 * 1024)
+#define MAX_ACPI_SIZE (45 * 1024)
post_code(0x9c);
/* Write ACPI tables to F segment and high tables area */
@@ -178,7 +179,28 @@ struct lb_memory *write_tables(void)
}
#endif
+#define MAX_SMBIOS_SIZE 2048
+#if CONFIG_GENERATE_SMBIOS_TABLES
+ high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE);
+ if (high_table_pointer) {
+ unsigned long new_high_table_pointer;
+ new_high_table_pointer = smbios_write_tables(high_table_pointer);
+ rom_table_end = ALIGN(rom_table_end, 16);
+ memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry));
+ rom_table_end += sizeof(struct smbios_entry);
+
+ if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) {
+ printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
+ }
+ printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
+ new_high_table_pointer - high_table_pointer);
+ } else {
+ unsigned long new_rom_table_end = smbios_write_tables(rom_table_end);
+ printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - rom_table_end);
+ rom_table_end = ALIGN(new_rom_table_end, 16);
+ }
+#endif
#define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
post_code(0x9d);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 17:04:13 +0000