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Diffstat (limited to 'src/arch/x86/postcar.c')
-rw-r--r--src/arch/x86/postcar.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c
index 7b5be6e9f0..6497b73e10 100644
--- a/src/arch/x86/postcar.c
+++ b/src/arch/x86/postcar.c
@@ -15,6 +15,7 @@
#include <arch/cpu.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <main_decl.h>
#include <program_loading.h>
@@ -24,7 +25,7 @@
* Systems without a native coreboot cache-as-ram teardown may implement
* this to use an alternate method.
*/
-__attribute__((weak)) void late_car_teardown(void) { /* do nothing */ }
+__weak void late_car_teardown(void) { /* do nothing */ }
void main(void)
{