1 files changed, 8 insertions, 4 deletions
diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c
index 34a4335121..7b5be6e9f0 100644
--- a/src/arch/x86/postcar.c
+++ b/src/arch/x86/postcar.c
@@ -13,18 +13,22 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/cpu.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <main_decl.h>
 #include <program_loading.h>
 #include <soc/intel/common/util.h>
-#include <fsp/util.h>
+
+/*
+ * Systems without a native coreboot cache-as-ram teardown may implement
+ * this to use an alternate method.
+ */
+__attribute__((weak)) void late_car_teardown(void) { /* do nothing */ }
 
 void main(void)
 {
-	/* Call TempRamExit FSP API if enabled. */
-	if (IS_ENABLED(CONFIG_FSP_CAR))
-		fsp_temp_ram_exit();
+	late_car_teardown();
 
 	console_init();