diff options
Diffstat (limited to 'src/arch/x86/init')
| -rw-r--r-- | src/arch/x86/init/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/x86/init/bootblock_normal.c | 52 | ||||
| -rw-r--r-- | src/arch/x86/init/bootblock_simple.c | 23 | ||||
| -rw-r--r-- | src/arch/x86/init/crt0_romcc_epilogue.inc | 21 | ||||
| -rw-r--r-- | src/arch/x86/init/failover.ld | 70 | ||||
| -rw-r--r-- | src/arch/x86/init/prologue.inc | 23 | ||||
| -rw-r--r-- | src/arch/x86/init/romstage.ld | 87 |
7 files changed, 0 insertions, 277 deletions
diff --git a/src/arch/x86/init/Makefile.inc b/src/arch/x86/init/Makefile.inc deleted file mode 100644 index 263c58e891..0000000000 --- a/src/arch/x86/init/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -# If you add something to this file, enable it in src/arch/x86/Makefile.inc first. diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c deleted file mode 100644 index bde2535ba6..0000000000 --- a/src/arch/x86/init/bootblock_normal.c +++ /dev/null @@ -1,52 +0,0 @@ -#include <smp/node.h> -#include <bootblock_common.h> -#include <pc80/mc146818rtc.h> -#include <halt.h> - -static const char *get_fallback(const char *stagelist) { - while (*stagelist) stagelist++; - return ++stagelist; -} - -static void main(unsigned long bist) -{ - unsigned long entry; - int boot_mode; - const char *default_filenames = "normal/romstage\0fallback/romstage"; - - if (boot_cpu()) { - bootblock_mainboard_init(); - -#if CONFIG_USE_OPTION_TABLE - sanitize_cmos(); -#endif - boot_mode = do_normal_boot(); - } else { - - /* Questionable single byte read from CMOS. - * Do not add any other CMOS access in the - * bootblock for AP CPUs. - */ - boot_mode = last_boot_normal(); - } - - char *filenames = (char *)walkcbfs("coreboot-stages"); - if (!filenames) { - filenames = default_filenames; - } - char *normal_candidate = filenames; - - if (boot_mode) - entry = findstage(normal_candidate); - else - entry = findstage(get_fallback(normal_candidate)); - - if (entry) call(entry, bist); - - /* run fallback if normal can't be found */ - entry = findstage(get_fallback(normal_candidate)); - if (entry) call(entry, bist); - - /* duh. we're stuck */ - halt(); -} diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c deleted file mode 100644 index adeecf7ba6..0000000000 --- a/src/arch/x86/init/bootblock_simple.c +++ /dev/null @@ -1,23 +0,0 @@ -#include <smp/node.h> -#include <bootblock_common.h> -#include <halt.h> - -static void main(unsigned long bist) -{ - if (boot_cpu()) { - bootblock_mainboard_init(); - -#if CONFIG_USE_OPTION_TABLE - sanitize_cmos(); -#endif -#if CONFIG_CMOS_POST - cmos_post_init(); -#endif - } - - const char* target1 = "fallback/romstage"; - unsigned long entry; - entry = findstage(target1); - if (entry) call(entry, bist); - halt(); -} diff --git a/src/arch/x86/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc deleted file mode 100644 index ff93adbc70..0000000000 --- a/src/arch/x86/init/crt0_romcc_epilogue.inc +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2002 Eric Biederman - * - * This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - */ -#include <cpu/x86/post_code.h> - -__main: - post_code(POST_PREPARE_RAMSTAGE) - cld /* clear direction flag */ - - movl $CONFIG_RAMTOP, %esp - movl %esp, %ebp - call copy_and_run - -.Lhlt: - post_code(POST_DEAD_CODE) - hlt - jmp .Lhlt diff --git a/src/arch/x86/init/failover.ld b/src/arch/x86/init/failover.ld deleted file mode 100644 index d7aa47e249..0000000000 --- a/src/arch/x86/init/failover.ld +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Advanced Micro Devices, Inc. - * Copyright (C) 2008-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -MEMORY { - rom : ORIGIN = 0xffff0000, LENGTH = 64K -} - -TARGET(binary) -SECTIONS -{ - /* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs - * with Startup IPI message without RAM. Align .rom to next 4 byte - * boundary anyway, so no pad byte appears between _rom and _start. - */ - .bogus ROMLOC_MIN : { - . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4); - ROMLOC = .; - } >rom = 0xff - - /* This section might be better named .setup */ - .rom ROMLOC : { - _rom = .; - ap_sipi_vector = .; - *(.rom.text); - *(.rom.data); - *(.rom.data.*); - *(.rodata.*); - _erom = .; - } >rom = 0xff - - /* Allocation reserves extra 16 bytes here. Alignment requirements - * may cause the total size of a section to change when the start - * address gets applied. - */ - ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) - - (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0); - - /* Post-check proper SIPI vector. */ - _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0), - "Bad SIPI vector alignment"); - _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR), - "Address mismatch on AP_SIPI_VECTOR"); - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - *(.iplt) - *(.rel.*) - *(.igot.*) - } -} diff --git a/src/arch/x86/init/prologue.inc b/src/arch/x86/init/prologue.inc deleted file mode 100644 index e0100b5127..0000000000 --- a/src/arch/x86/init/prologue.inc +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2002 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include <cpu/x86/post_code.h> - -.section ".rom.data", "a", @progbits -.section ".rom.text", "ax", @progbits diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld deleted file mode 100644 index 951ca656a3..0000000000 --- a/src/arch/x86/init/romstage.ld +++ /dev/null @@ -1,87 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Advanced Micro Devices, Inc. - * Copyright (C) 2008-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -TARGET(binary) -SECTIONS -{ - . = ROMSTAGE_BASE; - - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.text.*); - *(.text); - *(.text.*); - *(.rom.data); - . = ALIGN(4); - _cbmem_init_hooks = .; - KEEP(*(.rodata.cbmem_init_hooks)); - _ecbmem_init_hooks = .; - *(.rodata); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - *(.eh_frame); - } - - . = CONFIG_DCACHE_RAM_BASE; - .car.data . (NOLOAD) : { - _car_data_start = .; -#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) - _timestamp = .; - . = . + 0x100; - _etimestamp = .; -#endif - *(.car.global_data); - _car_data_end = .; - /* The preram cbmem console area comes last to take advantage - * of a zero-sized array to hold the memconsole contents. - * However, collisions within the cache-as-ram region cannot be - * statically checked because the cache-as-ram region usage is - * cpu/chipset dependent. */ - _preram_cbmem_console = .; - _epreram_cbmem_console = . + (CONFIG_LATE_CBMEM_INIT ? 0 : 0xc00); - } - - /* Global variables are not allowed in romstage - * This section is checked during stage creation to ensure - * that there are no global variables present - */ - - . = 0xffffff00; - .illegal_globals . : { - *(EXCLUDE_FILE ("*/libagesa.*.a:" "*/buildOpts.romstage.o" "*/agesawrapper.romstage.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data) - *(EXCLUDE_FILE ("*/libagesa.*.a:" "*/buildOpts.romstage.o" "*/agesawrapper.romstage.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data.*) - *(.bss) - *(.bss.*) - *(.sbss) - *(.sbss.*) - } - - _bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) + 0xc00 <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full"); -} |