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-rw-r--r--src/arch/x86/include/arch/io.h22
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h12
-rw-r--r--src/arch/x86/include/arch/pci_mmio_cfg.h18
3 files changed, 29 insertions, 23 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 3b61e85b07..859146578b 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -210,7 +210,10 @@ static inline int log2f(int value)
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
+/* FIXME: Sources for romstage still use device_t. */
+typedef u32 device_t;
+
+typedef u32 pci_devfn_t;
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
* We don't need to set %fs, and %gs anymore
@@ -220,23 +223,26 @@ typedef unsigned device_t; /* pci and pci_mmio need to have different ways to ha
#include <arch/pci_io_cfg.h>
#include <arch/pci_mmio_cfg.h>
-static inline __attribute__((always_inline)) void pci_or_config8(device_t dev, unsigned where, uint8_t value)
+static inline __attribute__((always_inline))
+void pci_or_config8(pci_devfn_t dev, unsigned where, uint8_t value)
{
pci_write_config8(dev, where, pci_read_config8(dev, where) | value);
}
-static inline __attribute__((always_inline)) void pci_or_config16(device_t dev, unsigned where, uint16_t value)
+static inline __attribute__((always_inline))
+void pci_or_config16(pci_devfn_t dev, unsigned where, uint16_t value)
{
pci_write_config16(dev, where, pci_read_config16(dev, where) | value);
}
-static inline __attribute__((always_inline)) void pci_or_config32(device_t dev, unsigned where, uint32_t value)
+static inline __attribute__((always_inline))
+void pci_or_config32(pci_devfn_t dev, unsigned where, uint32_t value)
{
pci_write_config32(dev, where, pci_read_config32(dev, where) | value);
}
#define PCI_DEV_INVALID (0xffffffffU)
-static inline device_t pci_io_locate_device(unsigned pci_id, device_t dev)
+static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
{
for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
@@ -248,7 +254,7 @@ static inline device_t pci_io_locate_device(unsigned pci_id, device_t dev)
return PCI_DEV_INVALID;
}
-static inline device_t pci_locate_device(unsigned pci_id, device_t dev)
+static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev)
{
for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
@@ -260,9 +266,9 @@ static inline device_t pci_locate_device(unsigned pci_id, device_t dev)
return PCI_DEV_INVALID;
}
-static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
+static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
{
- device_t dev, last;
+ pci_devfn_t dev, last;
dev = PCI_DEV(bus, 0, 0);
last = PCI_DEV(bus, 31, 7);
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index fbe83a2b47..63e1ac958c 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -21,7 +21,7 @@
#include <arch/io.h>
static inline __attribute__((always_inline))
-uint8_t pci_io_read_config8(device_t dev, unsigned where)
+uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -34,7 +34,7 @@ uint8_t pci_io_read_config8(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-uint16_t pci_io_read_config16(device_t dev, unsigned where)
+uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -47,7 +47,7 @@ uint16_t pci_io_read_config16(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-uint32_t pci_io_read_config32(device_t dev, unsigned where)
+uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -60,7 +60,7 @@ uint32_t pci_io_read_config32(device_t dev, unsigned where)
}
static inline __attribute__((always_inline))
-void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
+void pci_io_write_config8(pci_devfn_t dev, unsigned where, uint8_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -73,7 +73,7 @@ void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
}
static inline __attribute__((always_inline))
-void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
+void pci_io_write_config16(pci_devfn_t dev, unsigned where, uint16_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
@@ -86,7 +86,7 @@ void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
}
static inline __attribute__((always_inline))
-void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
+void pci_io_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index 545be236c2..b62a2166b9 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -26,7 +26,7 @@
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
static inline __attribute__ ((always_inline))
-u8 pcie_read_config8(device_t dev, unsigned int where)
+u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where;
@@ -34,7 +34,7 @@ u8 pcie_read_config8(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-u16 pcie_read_config16(device_t dev, unsigned int where)
+u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
@@ -42,7 +42,7 @@ u16 pcie_read_config16(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-u32 pcie_read_config32(device_t dev, unsigned int where)
+u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
@@ -50,7 +50,7 @@ u32 pcie_read_config32(device_t dev, unsigned int where)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config8(device_t dev, unsigned int where, u8 value)
+void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where;
@@ -58,7 +58,7 @@ void pcie_write_config8(device_t dev, unsigned int where, u8 value)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config16(device_t dev, unsigned int where, u16 value)
+void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
@@ -66,7 +66,7 @@ void pcie_write_config16(device_t dev, unsigned int where, u16 value)
}
static inline __attribute__ ((always_inline))
-void pcie_write_config32(device_t dev, unsigned int where, u32 value)
+void pcie_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
{
unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
@@ -74,21 +74,21 @@ void pcie_write_config32(device_t dev, unsigned int where, u32 value)
}
static inline __attribute__ ((always_inline))
-void pcie_or_config8(device_t dev, unsigned int where, u8 ormask)
+void pcie_or_config8(pci_devfn_t dev, unsigned int where, u8 ormask)
{
u8 value = pcie_read_config8(dev, where);
pcie_write_config8(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
-void pcie_or_config16(device_t dev, unsigned int where, u16 ormask)
+void pcie_or_config16(pci_devfn_t dev, unsigned int where, u16 ormask)
{
u16 value = pcie_read_config16(dev, where);
pcie_write_config16(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
-void pcie_or_config32(device_t dev, unsigned int where, u32 ormask)
+void pcie_or_config32(pci_devfn_t dev, unsigned int where, u32 ormask)
{
u32 value = pcie_read_config32(dev, where);
pcie_write_config32(dev, where, value | ormask);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 08:07:38 +0000