diff options
Diffstat (limited to 'src/arch/x86/car.ld')
| -rw-r--r-- | src/arch/x86/car.ld | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index d8ff4b36b7..2e29112467 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -36,11 +36,9 @@ /* Stack for CAR stages. Since it persists across all stages that * use CAR it can be reused. The chipset/SoC is expected to provide * the stack size. */ -#if !CONFIG(ROMCC_BOOTBLOCK) _car_stack = .; . += CONFIG_DCACHE_BSP_STACK_SIZE; _ecar_stack = .; -#endif /* The pre-ram cbmem console as well as the timestamp region are fixed * in size. Therefore place them above the car global section so that * multiple stages (romstage and verstage) have a consistent @@ -86,10 +84,6 @@ _ebss = .; _car_unallocated_start = .; -#if CONFIG(ROMCC_BOOTBLOCK) - _car_stack = .; - _ecar_stack = _car_region_end; -#endif _car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start); } @@ -108,6 +102,4 @@ _bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DC #if CONFIG(PAGING_IN_CACHE_AS_RAM) _bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned"); #endif -#if !CONFIG(ROMCC_BOOTBLOCK) _bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured"); -#endif |