diff options
Diffstat (limited to 'src/arch/x86/boot')
| -rw-r--r-- | src/arch/x86/boot/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/x86/boot/acpi.c | 4 | ||||
| -rw-r--r-- | src/arch/x86/boot/boot.c | 29 | ||||
| -rw-r--r-- | src/arch/x86/boot/ramstage_module_header.c | 24 | ||||
| -rw-r--r-- | src/arch/x86/boot/tables.c | 3 |
5 files changed, 61 insertions, 0 deletions
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 3f11c01611..9c18043c07 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -9,6 +9,7 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S +ramstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += ramstage_module_header.c $(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H) $(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index 327d175584..b04cbe52bf 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -759,6 +759,9 @@ extern unsigned int __wakeup_size; void acpi_jump_to_wakeup(void *vector) { +#if CONFIG_RELOCATABLE_RAMSTAGE + u32 acpi_backup_memory = 0; +#else u32 acpi_backup_memory = (u32)cbmem_find(CBMEM_ID_RESUME); if (!acpi_backup_memory) { @@ -766,6 +769,7 @@ void acpi_jump_to_wakeup(void *vector) "No S3 resume.\n"); return; } +#endif #if CONFIG_SMP // FIXME: This should go into the ACPI backup memory, too. No pork saussages. diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index d9cb02e776..4892c5e009 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -68,6 +68,34 @@ int elf_check_arch(Elf_ehdr *ehdr) } +#if CONFIG_RELOCATABLE_RAMSTAGE +/* When the ramstage is relocatable the elf loading ensures an elf image cannot + * be loaded over the ramstage code. */ +void jmp_to_elf_entry(void *entry, unsigned long unused1, unsigned long unused2) +{ + elf_boot_notes.hdr.b_checksum = + compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes)); + + /* Jump to kernel */ + __asm__ __volatile__( + " cld \n\t" + /* Now jump to the loaded image */ + " call *%0\n\t" + + /* The loaded image returned? */ + " cli \n\t" + " cld \n\t" + + :: + "r" (entry), +#if CONFIG_MULTIBOOT + "b"(mbi), "a" (MB_MAGIC2) +#else + "b"(&elf_boot_notes), "a" (0x0E1FB007) +#endif + ); +} +#else void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) { extern unsigned char _ram_seg, _eram_seg; @@ -182,5 +210,6 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) #endif ); } +#endif /* CONFIG_RELOCATABLE_RAMSTAGE */ diff --git a/src/arch/x86/boot/ramstage_module_header.c b/src/arch/x86/boot/ramstage_module_header.c new file mode 100644 index 0000000000..b958c16085 --- /dev/null +++ b/src/arch/x86/boot/ramstage_module_header.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 ChromeOS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <rmodule.h> + +extern char _start[]; + +DEFINE_RMODULE_HEADER(ramstage_module, _start, RMODULE_TYPE_STAGE); diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index 7f28861b56..294a10c46c 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -232,11 +232,14 @@ struct lb_memory *write_tables(void) post_code(0x9e); #if CONFIG_HAVE_ACPI_RESUME +/* Only add CBMEM_ID_RESUME when the ramstage isn't relocatable. */ +#if !CONFIG_RELOCATABLE_RAMSTAGE /* Let's prepare the ACPI S3 Resume area now already, so we can rely on * it begin there during reboot time. We don't need the pointer, nor * the result right now. If it fails, ACPI resume will be disabled. */ cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE); +#endif #if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY14 || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE); #endif |