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-rw-r--r--src/arch/x86/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 0c8b97d2f3..e18d6d05dd 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -111,8 +111,15 @@ config ROMCC
bool
default n
+config CBMEM_TOP_BACKUP
+ def_bool n
+ help
+ Platform implements non-volatile storage to cache cbmem_top()
+ over stage transitions and optionally also over S3 suspend.
+
config LATE_CBMEM_INIT
def_bool n
+ select CBMEM_TOP_BACKUP
help
Enable this in chipset's Kconfig if northbridge does not implement
early get_top_of_ram() call for romstage. CBMEM tables will be