diff options
Diffstat (limited to 'src/arch/mips/include')
| -rw-r--r-- | src/arch/mips/include/arch/bootblock_common.h | 24 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/byteorder.h | 23 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/cache.h | 48 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/cbconfig.h | 26 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/cpu.h | 172 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/early_variables.h | 27 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/exception.h | 19 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/header.ld | 26 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/hlt.h | 23 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/memlayout.h | 29 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/mmio.h | 64 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/mmu.h | 53 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/pci_ops.h | 19 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/stages.h | 22 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/types.h | 59 |
15 files changed, 0 insertions, 634 deletions
diff --git a/src/arch/mips/include/arch/bootblock_common.h b/src/arch/mips/include/arch/bootblock_common.h deleted file mode 100644 index b930b5c4e7..0000000000 --- a/src/arch/mips/include/arch/bootblock_common.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifdef CONFIG_BOOTBLOCK_CPU_INIT -#include CONFIG_BOOTBLOCK_CPU_INIT -#endif - -#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT -#include CONFIG_BOOTBLOCK_MAINBOARD_INIT -#else -static void bootblock_mainboard_init(void) -{ -} -#endif diff --git a/src/arch/mips/include/arch/byteorder.h b/src/arch/mips/include/arch/byteorder.h deleted file mode 100644 index 7c0ce47176..0000000000 --- a/src/arch/mips/include/arch/byteorder.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_BYTEORDER_H -#define __MIPS_ARCH_BYTEORDER_H - -#ifndef __ORDER_LITTLE_ENDIAN__ -#errror "What endian are you!?" -#endif - -#define __LITTLE_ENDIAN 1234 - -#endif /* __MIPS_ARCH_BYTEORDER_H */ diff --git a/src/arch/mips/include/arch/cache.h b/src/arch/mips/include/arch/cache.h deleted file mode 100644 index c610c991cf..0000000000 --- a/src/arch/mips/include/arch/cache.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_CACHE_H -#define __MIPS_ARCH_CACHE_H - -#include <stddef.h> -#include <stdint.h> - -#define CACHE_TYPE_SHIFT (0) -#define CACHE_OP_SHIFT (2) -#define CACHE_TYPE_MASK (0x3) -#define CACHE_OP_MASK (0x7) - -/* Cache type */ -#define ICACHE 0x00 -#define DCACHE 0x01 -#define L2CACHE 0x03 - -/* Cache operation*/ -#define WB_INVD 0x05 - -#define CACHE_CODE(type, op) ((((type) & (CACHE_TYPE_MASK)) << \ - (CACHE_TYPE_SHIFT)) | \ - (((op) & (CACHE_OP_MASK)) << (CACHE_OP_SHIFT))) - -/* Perform cache operation on cache lines for target addresses */ -void perform_cache_operation(uintptr_t start, size_t size, uint8_t operation); -/* Invalidate all caches: instruction, data, L2 data */ -void cache_invalidate_all(uintptr_t start, size_t size); - -/* TODO: Global cache API. Implement properly once we finally have a MIPS board - again where we can figure out what exactly these should be doing. */ -static inline void dcache_clean_all(void) {} -static inline void dcache_invalidate_all(void) {} -static inline void dcache_clean_invalidate_all(void) {} - -#endif /* __MIPS_ARCH_CACHE_H */ diff --git a/src/arch/mips/include/arch/cbconfig.h b/src/arch/mips/include/arch/cbconfig.h deleted file mode 100644 index 35c1387895..0000000000 --- a/src/arch/mips/include/arch/cbconfig.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _ARCH_CBCONFIG_H_ -#define _ARCH_CBCONFIG_H_ - -/* - * Instead of using Kconfig variables for internal coreboot infrastructure - * variables that are architecture dependent land those things in this file. - * If it's not obvious all variables that are used in the common code need - * to have the same name across all architectures. - */ - -#define COREBOOT_TABLE_SIZE 0x2000 - -#endif diff --git a/src/arch/mips/include/arch/cpu.h b/src/arch/mips/include/arch/cpu.h deleted file mode 100644 index 61eb0828cf..0000000000 --- a/src/arch/mips/include/arch/cpu.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_CPU_H -#define __MIPS_ARCH_CPU_H - -#include <device/device.h> - -#define asmlinkage - -struct cpu_driver { - struct device_operations *ops; - const struct cpu_device_id *id_table; -}; - -struct thread; - -struct cpu_info { - struct device *cpu; - unsigned long index; -}; - - -/*************************************************************************** - * The following section was copied from arch/mips/include/asm/mipsregs.h in - * the 3.14 kernel tree. - */ - -/* - * Macros to access the system control coprocessor - */ - -#define __read_32bit_c0_register(source, sel) \ -({ int __res; \ - if (sel == 0) \ - __asm__ __volatile__( \ - "mfc0\t%0, " #source "\n\t" \ - : "=r" (__res)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mfc0\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__res)); \ - __res; \ -}) - -#define __write_32bit_c0_register(register, sel, value) \ -do { \ - if (sel == 0) \ - __asm__ __volatile__( \ - "mtc0\t%z0, " #register "\n\t" \ - : : "Jr" ((unsigned int)(value))); \ - else \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mtc0\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0" \ - : : "Jr" ((unsigned int)(value))); \ -} while (0) - -/* Shortcuts to access various internal registers, keep adding as needed. */ -#define read_c0_index() __read_32bit_c0_register($0, 0) -#define write_c0_index(val) __write_32bit_c0_register($0, 0, (val)) - -#define read_c0_entrylo0() __read_32bit_c0_register($2, 0) -#define write_c0_entrylo0(val) __write_32bit_c0_register($2, 0, (val)) - -#define read_c0_entrylo1() __read_32bit_c0_register($3, 0) -#define write_c0_entrylo1(val) __write_32bit_c0_register($3, 0, (val)) - -#define read_c0_pagemask() __read_32bit_c0_register($5, 0) -#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, (val)) - -#define read_c0_wired() __read_32bit_c0_register($6, 0) -#define write_c0_wired(val) __write_32bit_c0_register($6, 0, (val)) - -#define read_c0_count() __read_32bit_c0_register($9, 0) -#define write_c0_count(val) __write_32bit_c0_register($9, 0, (val)) - -#define read_c0_entryhi() __read_32bit_c0_register($10, 0) -#define write_c0_entryhi(val) __write_32bit_c0_register($10, 0, (val)) - -#define read_c0_cause() __read_32bit_c0_register($13, 0) -#define write_c0_cause(val) __write_32bit_c0_register($13, 0, (val)) - -#define read_c0_config1() __read_32bit_c0_register($16, 1) -#define write_c0_config1(val) __write_32bit_c0_register($16, 1, (val)) - -#define read_c0_config2() __read_32bit_c0_register($16, 2) -#define write_c0_config2(val) __write_32bit_c0_register($16, 2, (val)) - -#define read_c0_l23taglo() __read_32bit_c0_register($28, 4) -#define write_c0_l23taglo(val) __write_32bit_c0_register($28, 4, (val)) - - -#define C0_ENTRYLO_PFN_SHIFT 6 - -#define C0_ENTRYLO_COHERENCY_MASK 0x00000038 -#define C0_ENTRYLO_COHERENCY_SHIFT 3 -/* Cacheable, write-back, non-coherent */ -#define C0_ENTRYLO_COHERENCY_WB (0x3 << C0_ENTRYLO_COHERENCY_SHIFT) -/* Uncached, non-coherent */ -#define C0_ENTRYLO_COHERENCY_UC (0x2 << C0_ENTRYLO_COHERENCY_SHIFT) - -/* Writeable */ -#define C0_ENTRYLO_D (0x1 << 2) -/* Valid */ -#define C0_ENTRYLO_V (0x1 << 1) -/* Global */ -#define C0_ENTRYLO_G (0x1 << 0) - -#define C0_PAGEMASK_SHIFT 13 -#define C0_PAGEMASK_MASK 0xffff - -#define C0_WIRED_MASK 0x3f - -#define C0_CAUSE_DC (1 << 27) - -#define C0_CONFIG1_MMUSIZE_SHIFT 25 -#define C0_CONFIG1_MMUSIZE_MASK 0x3f - -/* Hazard handling */ -static inline void __nop(void) -{ - __asm__ __volatile__("nop"); -} - -static inline void __ssnop(void) -{ - __asm__ __volatile__("sll\t$0, $0, 1"); -} - -#define mtc0_tlbw_hazard() \ -do { \ - __nop(); \ - __nop(); \ -} while (0) - -#define tlbw_use_hazard() \ -do { \ - __nop(); \ - __nop(); \ - __nop(); \ -} while (0) - -#define tlb_probe_hazard() \ -do { \ - __nop(); \ - __nop(); \ - __nop(); \ -} while (0) - -#define back_to_back_c0_hazard() \ -do { \ - __ssnop(); \ - __ssnop(); \ - __ssnop(); \ -} while (0) -/**************************************************************************/ - -#endif /* __MIPS_ARCH_CPU_H */ diff --git a/src/arch/mips/include/arch/early_variables.h b/src/arch/mips/include/arch/early_variables.h deleted file mode 100644 index 6ad82606c4..0000000000 --- a/src/arch/mips/include/arch/early_variables.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_EARLY_VARIABLES_H -#define __MIPS_ARCH_EARLY_VARIABLES_H - -#define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) - -static inline void *car_get_var_ptr(void *var) { return var; } -#define car_get_var(var) (var) -#define car_set_var(var, val) { (var) = (val); } - -#define car_get_ptr car_get_var -#define car_set_ptr car_set_var - -#endif /* __MIPS_ARCH_EARLY_VARIABLES_H */ diff --git a/src/arch/mips/include/arch/exception.h b/src/arch/mips/include/arch/exception.h deleted file mode 100644 index a0ab9ecebd..0000000000 --- a/src/arch/mips/include/arch/exception.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_EXCEPTION_H -#define __MIPS_ARCH_EXCEPTION_H - -static inline void exception_init(void) {} - -#endif /* __MIPS_ARCH_EXCEPTION_H */ diff --git a/src/arch/mips/include/arch/header.ld b/src/arch/mips/include/arch/header.ld deleted file mode 100644 index 7f832eb51c..0000000000 --- a/src/arch/mips/include/arch/header.ld +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* We use ELF as output format. So that we can debug the code in some form. */ -OUTPUT_ARCH(mips) - -PHDRS -{ - to_load PT_LOAD; -} - -#if ENV_BOOTBLOCK -ENTRY(_start) -#else -ENTRY(stage_entry) -#endif diff --git a/src/arch/mips/include/arch/hlt.h b/src/arch/mips/include/arch/hlt.h deleted file mode 100644 index 5feafe2b85..0000000000 --- a/src/arch/mips/include/arch/hlt.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_HLT_H -#define __MIPS_ARCH_HLT_H - -static inline __always_inline void hlt(void) -{ - for (;;) - ; -} - -#endif /* __MIPS_ARCH_HLT_H */ diff --git a/src/arch/mips/include/arch/memlayout.h b/src/arch/mips/include/arch/memlayout.h deleted file mode 100644 index bf862a30ea..0000000000 --- a/src/arch/mips/include/arch/memlayout.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This file contains macro definitions for memlayout.ld linker scripts. */ - -#ifndef __ARCH_MEMLAYOUT_H -#define __ARCH_MEMLAYOUT_H - -/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */ -/* TODO: Double-check that that's the correct alignment for our ABI. */ -#define STACK(addr, size) \ - REGION(stack, addr, size, 8) \ - _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc"); - -#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K) - -#define SOC_REGISTERS(addr, size) REGION(soc_registers, addr, size, 4) - -#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/mips/include/arch/mmio.h b/src/arch/mips/include/arch/mmio.h deleted file mode 100644 index 2564e3b60d..0000000000 --- a/src/arch/mips/include/arch/mmio.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_MMIO_H__ -#define __ARCH_MMIO_H__ - -#include <types.h> -#include <arch/cache.h> -#include <endian.h> - -static inline uint8_t read8(const volatile void *addr) -{ - asm("sync"); - return *(volatile uint8_t *)addr; -} - -static inline uint16_t read16(const volatile void *addr) -{ - asm("sync"); - return *(volatile uint16_t *)addr; -} - -static inline uint32_t read32(const volatile void *addr) -{ - asm("sync"); - return *(volatile uint32_t *)addr; -} - -static inline void write8(volatile void *addr, uint8_t val) -{ - asm("sync"); - *(volatile uint8_t *)addr = val; - asm("sync"); -} - -static inline void write16(volatile void *addr, uint16_t val) -{ - asm("sync"); - *(volatile uint16_t *)addr = val; - asm("sync"); -} - -static inline void write32(volatile void *addr, uint32_t val) -{ - asm("sync"); - *(volatile uint32_t *)addr = val; - asm("sync"); -} - -/* Fixing soc/imgtech/pistachio seemed painful at the time. */ -#define read32_x(addr) read32((void *)(addr)) -#define write32_x(addr, val) write32((void *)(addr), (val)) - -#endif /* __MIPS_ARCH_IO_H */ diff --git a/src/arch/mips/include/arch/mmu.h b/src/arch/mips/include/arch/mmu.h deleted file mode 100644 index f7377bb88c..0000000000 --- a/src/arch/mips/include/arch/mmu.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_MMU_H -#define __MIPS_ARCH_MMU_H - -#include <arch/cpu.h> -#include <stddef.h> -#include <stdint.h> - -static inline void tlb_write_indexed(void) -{ - __asm__ __volatile__( - ".set noreorder\n\t" - "tlbwi\n\t" - ".set reorder"); -} - -static inline uint32_t get_max_pagesize(void) -{ - uint32_t max_pgsize; - - write_c0_pagemask(C0_PAGEMASK_MASK << C0_PAGEMASK_SHIFT); - back_to_back_c0_hazard(); - max_pgsize = (((read_c0_pagemask() >> C0_PAGEMASK_SHIFT) & - C0_PAGEMASK_MASK) + 1) * 4 * KiB; - - return max_pgsize; -} - -static inline uint32_t get_tlb_size(void) -{ - uint32_t tlbsize; - - tlbsize = ((read_c0_config1() >> C0_CONFIG1_MMUSIZE_SHIFT) & - C0_CONFIG1_MMUSIZE_MASK) + 1; - - return tlbsize; -} - -int identity_map(uint32_t start, size_t len, uint32_t coherency); - -#endif /* __MIPS_ARCH_MMU_H */ diff --git a/src/arch/mips/include/arch/pci_ops.h b/src/arch/mips/include/arch/pci_ops.h deleted file mode 100644 index da397cf3b8..0000000000 --- a/src/arch/mips/include/arch/pci_ops.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef ARCH_MIPS_PCI_OPS_H -#define ARCH_MIPS_PCI_OPS_H - -#include <device/pci_mmio_cfg.h> - -#endif diff --git a/src/arch/mips/include/arch/stages.h b/src/arch/mips/include/arch/stages.h deleted file mode 100644 index 3da02da1ca..0000000000 --- a/src/arch/mips/include/arch/stages.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_STAGES_H -#define __MIPS_ARCH_STAGES_H - -#include <stdint.h> -#include <main_decl.h> - -void stage_entry(uintptr_t stage_arg); - -#endif /* __MIPS_ARCH_STAGES_H */ diff --git a/src/arch/mips/include/arch/types.h b/src/arch/mips/include/arch/types.h deleted file mode 100644 index fa14b6a684..0000000000 --- a/src/arch/mips/include/arch/types.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MIPS_ARCH_TYPES_H -#define __MIPS_ARCH_TYPES_H - -typedef unsigned short umode_t; - -/* - * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the - * header files exported to user space - */ - -typedef __signed__ char __s8; -typedef unsigned char __u8; - -typedef __signed__ short __s16; -typedef unsigned short __u16; - -typedef __signed__ int __s32; -typedef unsigned int __u32; - -#if defined(__GNUC__) -__extension__ typedef __signed__ long long __s64; -__extension__ typedef unsigned long long __u64; -#endif - -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long long s64; -typedef unsigned long long u64; - -#define BITS_PER_LONG 32 - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -typedef unsigned long phys_addr_t; -typedef unsigned long phys_size_t; - -#endif /* __MIPS_ARCH_TYPES_H */ |