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-rw-r--r--src/arch/i386/include/arch/intel.h6
-rw-r--r--src/arch/i386/init/bootblock_prologue.c2
-rw-r--r--src/arch/i386/init/car.S2
-rw-r--r--src/arch/i386/init/crt0.S.lb10
-rw-r--r--src/arch/i386/lib/c_start.S6
-rw-r--r--src/arch/i386/lib/printk_init.c11
-rw-r--r--src/arch/i386/llshell/console.inc174
-rw-r--r--src/arch/i386/llshell/ramtest.inc2
-rw-r--r--src/arch/i386/llshell/readme.coreboot2
9 files changed, 16 insertions, 199 deletions
diff --git a/src/arch/i386/include/arch/intel.h b/src/arch/i386/include/arch/intel.h
index d276b32596..c6f90cca2e 100644
--- a/src/arch/i386/include/arch/intel.h
+++ b/src/arch/i386/include/arch/intel.h
@@ -45,10 +45,8 @@ label##_done:
jmp *%esp
-/* originally this macro was from STPC BIOS */
-#define intel_chip_post_macro(value) \
- movb $value, %al ; \
+#define post_code(value) \
+ movb $value, %al; \
outb %al, $0x80
-
#endif /* ROM_INTEL_H */
diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c
index f921c3f8d0..4baaa08a6e 100644
--- a/src/arch/i386/init/bootblock_prologue.c
+++ b/src/arch/i386/init/bootblock_prologue.c
@@ -33,5 +33,5 @@
.section ".rom.data", "a", @progbits
.section ".rom.text", "ax", @progbits
- intel_chip_post_macro(0x01) /* delay for chipsets */
+ post_code(0x01) /* delay for chipsets */
diff --git a/src/arch/i386/init/car.S b/src/arch/i386/init/car.S
index 107da7b222..64743ef8fc 100644
--- a/src/arch/i386/init/car.S
+++ b/src/arch/i386/init/car.S
@@ -54,7 +54,7 @@ __protected_stage0:
/* Save the BIST result. */
movl %eax, %ebp
- intel_chip_post_macro(0x01)
+ post_code(0x01)
movw $ROM_DATA_SEG, %ax
movw %ax, %ds
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index c4206bf007..5e7a5fa8c7 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -25,6 +25,10 @@
#include <arch/intel.h>
#include <console/loglevel.h>
+#ifndef ASM_CONSOLE_LOGLEVEL
+#define ASM_CONSOLE_LOGLEVEL CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
+#endif
+
/*
* This is the entry code the code in .reset section
* jumps to this address.
@@ -33,7 +37,7 @@
.section ".rom.data", "a", @progbits
.section ".rom.text", "ax", @progbits
- intel_chip_post_macro(0x01) /* delay for chipsets */
+ post_code(0x01) /* delay for chipsets */
#include "crt0_includes.h"
@@ -61,7 +65,7 @@ __main:
* isn\'t really that big we just copy/clear using bytes, not
* double words.
*/
- intel_chip_post_macro(0x11) /* post 11 */
+ post_code(0x11) /* post 11 */
cld /* clear direction flag */
@@ -78,7 +82,7 @@ __main:
call cbfs_and_run_core
.Lhlt:
- intel_chip_post_macro(0xee) /* post fe */
+ post_code(0xee) /* post fe */
hlt
jmp .Lhlt
diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S
index 4ef59799a9..312f0cb206 100644
--- a/src/arch/i386/lib/c_start.S
+++ b/src/arch/i386/lib/c_start.S
@@ -15,7 +15,7 @@ _start:
movl %eax, %fs
movl %eax, %gs
- intel_chip_post_macro(0x13) /* post 13 */
+ post_code(0x13) /* post 13 */
/** clear stack */
cld
@@ -74,7 +74,7 @@ _start:
* bss is cleared. Now we call the main routine and
* let it do the rest.
*/
- intel_chip_post_macro(0xfe) /* post fe */
+ post_code(0xfe) /* post fe */
/* Restore the stack location */
movl %ebp, %esp
@@ -83,7 +83,7 @@ _start:
call hardwaremain
/*NOTREACHED*/
.Lhlt:
- intel_chip_post_macro(0xee) /* post ee */
+ post_code(0xee) /* post ee */
hlt
jmp .Lhlt
diff --git a/src/arch/i386/lib/printk_init.c b/src/arch/i386/lib/printk_init.c
index f3add87111..d3064046f7 100644
--- a/src/arch/i386/lib/printk_init.c
+++ b/src/arch/i386/lib/printk_init.c
@@ -19,19 +19,8 @@
#include <console/console.h>
#include <console/vtxprintf.h>
-#include <console/loglevel.h>
#include <uart8250.h>
-/* Using a global varible can cause problems when we reset the stack
- * from cache as ram to ram. If we make this a define USE_SHARED_STACK
- * we could use the same code on all architectures.
- */
-#if 0
-int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
-#else
-#define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-#endif
-
static void console_tx_byte(unsigned char byte)
{
if (byte == '\n')
diff --git a/src/arch/i386/llshell/console.inc b/src/arch/i386/llshell/console.inc
index fbe9d632bf..774c9cb158 100644
--- a/src/arch/i386/llshell/console.inc
+++ b/src/arch/i386/llshell/console.inc
@@ -234,180 +234,6 @@ jmp console0
#define CONSOLE_SPEW_TX_STRING(string) __CONSOLE_TX_STRING(string)
#define CONSOLE_SPEW_INLINE_TX_STRING(string) __CONSOLE_INLINE_TX_STRING(string)
-#if 0
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_EMERG
-#undef CONSOLE_EMERG_TX_CHAR
-#undef CONSOLE_EMERG_INLINE_TX_CHAR
-#undef CONSOLE_EMERG_TX_HEX8
-#undef CONSOLE_EMERG_INLINE_TX_HEX8
-#undef CONSOLE_EMERG_TX_HEX32
-#undef CONSOLE_EMERG_INLINE_TX_HEX32
-#undef CONSOLE_EMERG_TX_STRING
-#undef CONSOLE_EMERG_INLINE_TX_STRING
-#define CONSOLE_EMERG_TX_CHAR(byte)
-#define CONSOLE_EMERG_INLINE_TX_CHAR(byte)
-#define CONSOLE_EMERG_TX_HEX8(byte)
-#define CONSOLE_EMERG_INLINE_TX_HEX8(byte)
-#define CONSOLE_EMERG_TX_HEX32(lword)
-#define CONSOLE_EMERG_INLINE_TX_HEX32(lword)
-#define CONSOLE_EMERG_TX_STRING(string)
-#define CONSOLE_EMERG_INLINE_TX_STRING(string)
-#endif
-
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_ALERT
-#undef CONSOLE_ALERT_TX_CHAR
-#undef CONSOLE_ALERT_INLINE_TX_CHAR
-#undef CONSOLE_ALERT_TX_HEX8
-#undef CONSOLE_ALERT_INLINE_TX_HEX8
-#undef CONSOLE_ALERT_TX_HEX32
-#undef CONSOLE_ALERT_INLINE_TX_HEX32
-#undef CONSOLE_ALERT_TX_STRING
-#undef CONSOLE_ALERT_INLINE_TX_STRING
-#define CONSOLE_ALERT_TX_CHAR(byte)
-#define CONSOLE_ALERT_INLINE_TX_CHAR(byte)
-#define CONSOLE_ALERT_TX_HEX8(byte)
-#define CONSOLE_ALERT_INLINE_TX_HEX8(byte)
-#define CONSOLE_ALERT_TX_HEX32(lword)
-#define CONSOLE_ALERT_INLINE_TX_HEX32(lword)
-#define CONSOLE_ALERT_TX_STRING(string)
-#define CONSOLE_ALERT_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_CRIT
-#undef CONSOLE_CRIT_TX_CHAR
-#undef CONSOLE_CRIT_INLINE_TX_CHAR
-#undef CONSOLE_CRIT_TX_HEX8
-#undef CONSOLE_CRIT_INLINE_TX_HEX8
-#undef CONSOLE_CRIT_TX_HEX32
-#undef CONSOLE_CRIT_INLINE_TX_HEX32
-#undef CONSOLE_CRIT_TX_STRING
-#undef CONSOLE_CRIT_INLINE_TX_STRING
-#define CONSOLE_CRIT_TX_CHAR(byte)
-#define CONSOLE_CRIT_INLINE_TX_CHAR(byte)
-#define CONSOLE_CRIT_TX_HEX8(byte)
-#define CONSOLE_CRIT_INLINE_TX_HEX8(byte)
-#define CONSOLE_CRIT_TX_HEX32(lword)
-#define CONSOLE_CRIT_INLINE_TX_HEX32(lword)
-#define CONSOLE_CRIT_TX_STRING(string)
-#define CONSOLE_CRIT_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_ERR
-#undef CONSOLE_ERR_TX_CHAR
-#undef CONSOLE_ERR_INLINE_TX_CHAR
-#undef CONSOLE_ERR_TX_HEX8
-#undef CONSOLE_ERR_INLINE_TX_HEX8
-#undef CONSOLE_ERR_TX_HEX32
-#undef CONSOLE_ERR_INLINE_TX_HEX32
-#undef CONSOLE_ERR_TX_STRING
-#undef CONSOLE_ERR_INLINE_TX_STRING
-#define CONSOLE_ERR_TX_CHAR(byte)
-#define CONSOLE_ERR_INLINE_TX_CHAR(byte)
-#define CONSOLE_ERR_TX_HEX8(byte)
-#define CONSOLE_ERR_INLINE_TX_HEX8(byte)
-#define CONSOLE_ERR_TX_HEX32(lword)
-#define CONSOLE_ERR_INLINE_TX_HEX32(lword)
-#define CONSOLE_ERR_TX_STRING(string)
-#define CONSOLE_ERR_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_WARNING
-#undef CONSOLE_WARNING_TX_CHAR
-#undef CONSOLE_WARNING_INLINE_TX_CHAR
-#undef CONSOLE_WARNING_TX_HEX8
-#undef CONSOLE_WARNING_INLINE_TX_HEX8
-#undef CONSOLE_WARNING_TX_HEX32
-#undef CONSOLE_WARNING_INLINE_TX_HEX32
-#undef CONSOLE_WARNING_TX_STRING
-#undef CONSOLE_WARNING_INLINE_TX_STRING
-#define CONSOLE_WARNING_TX_CHAR(byte)
-#define CONSOLE_WARNING_INLINE_TX_CHAR(byte)
-#define CONSOLE_WARNING_TX_HEX8(byte)
-#define CONSOLE_WARNING_INLINE_TX_HEX8(byte)
-#define CONSOLE_WARNING_TX_HEX32(lword)
-#define CONSOLE_WARNING_INLINE_TX_HEX32(lword)
-#define CONSOLE_WARNING_TX_STRING(string)
-#define CONSOLE_WARNING_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_NOTICE
-#undef CONSOLE_NOTICE_TX_CHAR
-#undef CONSOLE_NOTICE_INLINE_TX_CHAR
-#undef CONSOLE_NOTICE_TX_HEX8
-#undef CONSOLE_NOTICE_INLINE_TX_HEX8
-#undef CONSOLE_NOTICE_TX_HEX32
-#undef CONSOLE_NOTICE_INLINE_TX_HEX32
-#undef CONSOLE_NOTICE_TX_STRING
-#undef CONSOLE_NOTICE_INLINE_TX_STRING
-#define CONSOLE_NOTICE_TX_CHAR(byte)
-#define CONSOLE_NOTICE_INLINE_TX_CHAR(byte)
-#define CONSOLE_NOTICE_TX_HEX8(byte)
-#define CONSOLE_NOTICE_INLINE_TX_HEX8(byte)
-#define CONSOLE_NOTICE_TX_HEX32(lword)
-#define CONSOLE_NOTICE_INLINE_TX_HEX32(lword)
-#define CONSOLE_NOTICE_TX_STRING(string)
-#define CONSOLE_NOTICE_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_INFO
-#undef CONSOLE_INFO_TX_CHAR
-#undef CONSOLE_INFO_INLINE_TX_CHAR
-#undef CONSOLE_INFO_TX_HEX8
-#undef CONSOLE_INFO_INLINE_TX_HEX8
-#undef CONSOLE_INFO_TX_HEX32
-#undef CONSOLE_INFO_INLINE_TX_HEX32
-#undef CONSOLE_INFO_TX_STRING
-#undef CONSOLE_INFO_INLINE_TX_STRING
-#define CONSOLE_INFO_TX_CHAR(byte)
-#define CONSOLE_INFO_INLINE_TX_CHAR(byte)
-#define CONSOLE_INFO_TX_HEX8(byte)
-#define CONSOLE_INFO_INLINE_TX_HEX8(byte)
-#define CONSOLE_INFO_TX_HEX32(lword)
-#define CONSOLE_INFO_INLINE_TX_HEX32(lword)
-#define CONSOLE_INFO_TX_STRING(string)
-#define CONSOLE_INFO_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_DEBUG
-#undef CONSOLE_DEBUG_TX_CHAR
-#undef CONSOLE_DEBUG_INLINE_TX_CHAR
-#undef CONSOLE_DEBUG_TX_HEX8
-#undef CONSOLE_DEBUG_INLINE_TX_HEX8
-#undef CONSOLE_DEBUG_TX_HEX32
-#undef CONSOLE_DEBUG_INLINE_TX_HEX32
-#undef CONSOLE_DEBUG_TX_STRING
-#undef CONSOLE_DEBUG_INLINE_TX_STRING
-#define CONSOLE_DEBUG_TX_CHAR(byte)
-#define CONSOLE_DEBUG_INLINE_TX_CHAR(byte)
-#define CONSOLE_DEBUG_TX_HEX8(byte)
-#define CONSOLE_DEBUG_INLINE_TX_HEX8(byte)
-#define CONSOLE_DEBUG_TX_HEX32(lword)
-#define CONSOLE_DEBUG_INLINE_TX_HEX32(lword)
-#define CONSOLE_DEBUG_TX_STRING(string)
-#define CONSOLE_DEBUG_INLINE_TX_STRING(string)
-#endif
-
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_SPEW
-#undef CONSOLE_SPEW_TX_CHAR
-#undef CONSOLE_SPEW_INLINE_TX_CHAR
-#undef CONSOLE_SPEW_TX_HEX8
-#undef CONSOLE_SPEW_INLINE_TX_HEX8
-#undef CONSOLE_SPEW_TX_HEX32
-#undef CONSOLE_SPEW_INLINE_TX_HEX32
-#undef CONSOLE_SPEW_TX_STRING
-#undef CONSOLE_SPEW_INLINE_TX_STRING
-#define CONSOLE_SPEW_TX_CHAR(byte)
-#define CONSOLE_SPEW_INLINE_TX_CHAR(byte)
-#define CONSOLE_SPEW_TX_HEX8(byte)
-#define CONSOLE_SPEW_INLINE_TX_HEX8(byte)
-#define CONSOLE_SPEW_TX_HEX32(lword)
-#define CONSOLE_SPEW_INLINE_TX_HEX32(lword)
-#define CONSOLE_SPEW_TX_STRING(string)
-#define CONSOLE_SPEW_INLINE_TX_STRING(string)
-#endif
-#endif
-
/* uses: esp, ax, dx */
console_tx_al:
__CONSOLE_INLINE_TX_AL
diff --git a/src/arch/i386/llshell/ramtest.inc b/src/arch/i386/llshell/ramtest.inc
index dfe06adf71..910f01608f 100644
--- a/src/arch/i386/llshell/ramtest.inc
+++ b/src/arch/i386/llshell/ramtest.inc
@@ -112,7 +112,7 @@ ramtest:
jmp 3b
5:
CONSOLE_INFO_TX_STRING($rt_toomany)
- intel_chip_post_macro(0xf1)
+ post_code(0xf1)
jmp .Lhlt
6:
diff --git a/src/arch/i386/llshell/readme.coreboot b/src/arch/i386/llshell/readme.coreboot
index fb23d1a9d4..ae7dcbecd0 100644
--- a/src/arch/i386/llshell/readme.coreboot
+++ b/src/arch/i386/llshell/readme.coreboot
@@ -16,7 +16,7 @@ llshell_ret1:
3) Optionally, comment out two lines in ramtest.inc:
5:
CONSOLE_INFO_TX_STRING($rt_toomany)
- // intel_chip_post_macro(0xf1)
+ // post_code(0xf1)
// jmp .Lhlt
otherwise, a ramtest failure will hang
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 06:05:50 +0000