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-rw-r--r--src/arch/armv7/lib/Makefile.inc3
-rw-r--r--src/arch/armv7/lib/cache-cp15.c6
2 files changed, 8 insertions, 1 deletions
diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc
index 391b6a54b1..388864aa28 100644
--- a/src/arch/armv7/lib/Makefile.inc
+++ b/src/arch/armv7/lib/Makefile.inc
@@ -1,5 +1,7 @@
bootblock-y += syslib.c
bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c
+bootblock-y += cache_v7.c
+bootblock-y += cache-cp15.c
romstage-y += cache_v7.c
romstage-y += cache-cp15.c
@@ -14,6 +16,7 @@ ramstage-y += div64.S
#ramstage-y += memcpy.S
#ramstage-y += memset.S
ramstage-y += syslib.c
+ramstage-y += cache_v7.c
#FIXME(dhendrix): should this be a config option?
romstage-y += eabi_compat.c
diff --git a/src/arch/armv7/lib/cache-cp15.c b/src/arch/armv7/lib/cache-cp15.c
index cfbdb941a0..e08ea57a56 100644
--- a/src/arch/armv7/lib/cache-cp15.c
+++ b/src/arch/armv7/lib/cache-cp15.c
@@ -46,8 +46,12 @@ static void set_section_dcache(int section, enum dcache_option option)
/*
* FIXME(dhendrix): This calculation is from arch/arm/lib/board.c
* in u-boot. We may need to subtract more due to logging.
+ * FIXME(rminnich)
+ * The cast avoids an incorrect overflow diagnostic.
+ * We really need to start adding ULL to constants that are
+ * intrinsically unsigned.
*/
- tlb_addr = (CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20UL));
+ tlb_addr = ((u32)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20UL));
tlb_addr -= tlb_size;
/* round down to next 64KB limit */
tlb_addr &= ~(0x10000 - 1);