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-rw-r--r--src/arch/arm/include/armv7/arch/cache.h9
-rw-r--r--src/arch/arm/include/armv7/arch/cpu.h2
2 files changed, 5 insertions, 6 deletions
diff --git a/src/arch/arm/include/armv7/arch/cache.h b/src/arch/arm/include/armv7/arch/cache.h
index 1e6477768c..dd271c5bce 100644
--- a/src/arch/arm/include/armv7/arch/cache.h
+++ b/src/arch/arm/include/armv7/arch/cache.h
@@ -134,12 +134,11 @@ static inline void write_mair0(uint32_t val)
/* write translation table base register 0 (TTBR0) */
static inline void write_ttbr0(uint32_t val)
{
-#if CONFIG_ARM_LPAE
- asm volatile ("mcrr p15, 0, %[val], %[zero], c2" : :
+ if (IS_ENABLED(CONFIG_ARM_LPAE))
+ asm volatile ("mcrr p15, 0, %[val], %[zero], c2" : :
[val] "r" (val), [zero] "r" (0));
-#else
- asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r" (val) : "memory");
-#endif
+ else
+ asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r" (val) : "memory");
}
/* read translation table base control register (TTBCR) */
diff --git a/src/arch/arm/include/armv7/arch/cpu.h b/src/arch/arm/include/armv7/arch/cpu.h
index d9f59d56d1..b7ef20d5d5 100644
--- a/src/arch/arm/include/armv7/arch/cpu.h
+++ b/src/arch/arm/include/armv7/arch/cpu.h
@@ -33,7 +33,7 @@ struct thread;
struct cpu_info {
device_t cpu;
unsigned long index;
-#if CONFIG_COOP_MULTITASKING
+#if IS_ENABLED(CONFIG_COOP_MULTITASKING)
struct thread *thread;
#endif
};