diff options
Diffstat (limited to 'payloads/libpayload/drivers/timer/ipq40xx.c')
-rw-r--r-- | payloads/libpayload/drivers/timer/ipq40xx.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/payloads/libpayload/drivers/timer/ipq40xx.c b/payloads/libpayload/drivers/timer/ipq40xx.c new file mode 100644 index 0000000000..0ca260047e --- /dev/null +++ b/payloads/libpayload/drivers/timer/ipq40xx.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2015, 2016, The Linux Foundation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of The Linux Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include <libpayload.h> + +#define GCNT_FREQ_MHZ 48 + +#define MSM_TMR_BASE ((void *)0x004a1000u) +#define GCNT_CNTCV_LO (MSM_TMR_BASE + 0x1000) +#define GCNT_CNTCV_HI (MSM_TMR_BASE + 0x1004) + +uint64_t timer_hz(void) +{ + return GCNT_FREQ_MHZ * 1000 * 1000; +} + +uint64_t timer_raw_value(void) +{ + uint32_t hi, lo; + + do { + hi = read32(GCNT_CNTCV_HI); + lo = read32(GCNT_CNTCV_LO); + } while (hi != read32(GCNT_CNTCV_HI)); + + return ((((uint64_t)hi) << 32) | lo); +} |