diff options
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/Intel/SoC/soc.html | 2 | ||||
| -rw-r--r-- | Documentation/acpi/devicetree.md | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 6b1bb30740..53131c6e6f 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -657,7 +657,7 @@ Use the following steps to debug the call to TempRamInit: The EDK2 data structure is defined in MdeModulePkg/Include/IndustryStandard/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/MdePkg/Include/IndustryStandard/Acpi61.h#l111">Acpi61.h</a> The coreboot data structure is defined in - src/arch/x86/include/arch/<a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/arch/x86/include/arch/acpi.h;hb=HEAD#l237">acpi.h</a> + src/arch/x86/include/arch/<a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/arch/x86/include/acpi/acpi.h;hb=HEAD#l237">acpi.h</a> </p> <ol> diff --git a/Documentation/acpi/devicetree.md b/Documentation/acpi/devicetree.md index 556c9668f6..c3c4c2e402 100644 --- a/Documentation/acpi/devicetree.md +++ b/Documentation/acpi/devicetree.md @@ -157,7 +157,7 @@ Note that the ACPI_IRQ_WAKE_EDGE_LOW macro informs the platform that the GPIO will be routed through SCI (ACPI's System Control Interrupt) for use as a wake source. Also note that the IRQ names are SoC-specific, and you will need to find the names in your SoC's header file. The ACPI_* macros are defined in -``src/arch/x86/include/arch/acpi_device.h``. +``src/arch/x86/include/acpi/acpi_device.h``. Using a GPIO as an IRQ requires that it is configured in coreboot correctly. This is often done in a mainboard-specific file named ``gpio.c``. |