diff options
Diffstat (limited to 'Documentation/soc')
| -rw-r--r-- | Documentation/soc/intel/icelake/iceLake_coreboot_development.md | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md index 59b013dc03..6f194cae15 100644 --- a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md +++ b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md @@ -33,27 +33,27 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel ## Create coreboot Image 1. Clone latest coreboot code as below -```bash -$ git clone https://review.coreboot.org/coreboot.git -``` + ```bash + $ git clone https://review.coreboot.org/coreboot.git + ``` 2. Place blobs (ucode, me.bin and FSP packages) in appropriate locations -Note: -Consider the fact that ucode and ME kit for Ice Lake SoC will be available from Intel VIP site. -After product launch, FSP binary will be available externally as any other program. + Note: + Consider the fact that ucode and ME kit for Ice Lake SoC will be available from Intel VIP site. + After product launch, FSP binary will be available externally as any other program. 3. Create coreboot .config 4. Build toolchain -```bash -CPUS=$(nproc--ignore=1) make crossgcc-i386 iasl -``` + ```bash + CPUS=$(nproc--ignore=1) make crossgcc-i386 iasl + ``` 5. Build image -```bash -$ make # the image is generated as build/coreboot.rom -``` + ```bash + $ make # the image is generated as build/coreboot.rom + ``` ## Flashing coreboot |