diff options
Diffstat (limited to 'Documentation/soc/intel')
| -rw-r--r-- | Documentation/soc/intel/icelake/iceLake_coreboot_development.md | 5 | ||||
| -rw-r--r-- | Documentation/soc/intel/index.md | 2 |
2 files changed, 1 insertions, 6 deletions
diff --git a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md index 5f8e279841..214733140b 100644 --- a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md +++ b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md @@ -20,11 +20,6 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel :doc:`../../../mainboard/intel/icelake_rvp` ``` -3. OEMs to design based on reference platform and make use of mainboard sample code. Dragonegg is Ice Lake based mainboard developed by Google - ```eval_rst - :doc:`../../../mainboard/google/dragonegg` - ``` - ### Summary: * SoC is Ice Lake. * Reference platform is icelake_rvp. diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md index 5c7239af6b..71e427ebef 100644 --- a/Documentation/soc/intel/index.md +++ b/Documentation/soc/intel/index.md @@ -11,4 +11,4 @@ This section contains documentation about coreboot on specific Intel SOCs. - [Microcode Updates](microcode.md) - [Firmware Interface Table](fit.md) - [Apollolake](apollolake/index.md) -- [CSE FW Update](cse_fw_update/cse_fw_update_model.md) +- [CSE FW Update](cse_fw_update/cse_fw_update.md) |