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-rw-r--r--Documentation/soc/amd/index.md16
-rw-r--r--Documentation/soc/amd/psp_integration.md10
2 files changed, 17 insertions, 9 deletions
diff --git a/Documentation/soc/amd/index.md b/Documentation/soc/amd/index.md
index e4fa6c9337..0ad8816929 100644
--- a/Documentation/soc/amd/index.md
+++ b/Documentation/soc/amd/index.md
@@ -4,10 +4,18 @@ This section contains documentation about coreboot on specific AMD SOCs.
## Technology
-- [Family 15h](family15h.md)
-- [Family 17h](family17h.md)
-- [Platform Security Processor Integration](psp_integration.md)
+```{toctree}
+:maxdepth: 1
+
+Family 15h <family15h.md>
+Family 17h <family17h.md>
+Platform Security Processor Integration <psp_integration.md>
+```
## amd_blobs Repository License
-- [amd_blobs](amdblobs_license.md)
+```{toctree}
+:maxdepth: 1
+
+amd_blobs <amdblobs_license.md>
+```
diff --git a/Documentation/soc/amd/psp_integration.md b/Documentation/soc/amd/psp_integration.md
index 8e27f5942f..74f35b9e2e 100644
--- a/Documentation/soc/amd/psp_integration.md
+++ b/Documentation/soc/amd/psp_integration.md
@@ -37,7 +37,7 @@ any of the eligible locations. Below are typical definitions within the
structure (for all families combined). Individual features supported vary by
family and model.
-```eval_rst
+```{eval-rst}
+--------------+---------------+------------------+----------------------------+
| Field Name | Offset (Hex) | Size (In Bytes) | Description/Purpose |
+==============+===============+==================+============================+
@@ -85,7 +85,7 @@ allowing secondary tables to be referenced by device ID. No coreboot
implementations currently use combo tables.
### PSP Directory Table Header
-```eval_rst
+```{eval-rst}
+--------------+---------------+------------------+----------------------------+
| Field Name | Offset (Hex) | Size (In Bytes) | Description/Purpose |
+==============+===============+==================+============================+
@@ -105,7 +105,7 @@ implementations currently use combo tables.
```
### PSP Directory Table Entries
-```eval_rst
+```{eval-rst}
+--------------+---------------+------------------+----------------------------+
| Field Name | Offset (Hex) | Size (In Bits) | Description/Purpose |
+==============+===============+==================+============================+
@@ -260,7 +260,7 @@ The BIOS Directory table structure is slightly different from the PSP Directory:
### BIOS Directory Table Header
-```eval_rst
+```{eval-rst}
+--------------+---------------+------------------+----------------------------+
| Field Name | Offset (Hex) | Size (In Bytes) | Description/Purpose |
+==============+===============+==================+============================+
@@ -281,7 +281,7 @@ The BIOS Directory table structure is slightly different from the PSP Directory:
### BIOS Directory Table Entries
-```eval_rst
+```{eval-rst}
+--------------+---------------+------------------+----------------------------+
| Field Name | Offset (Hex) | Size (In Bits) | Description/Purpose |
+==============+===============+==================+============================+