diff options
Diffstat (limited to 'Documentation/mainboard')
104 files changed, 478 insertions, 310 deletions
diff --git a/Documentation/mainboard/acer/g43t-am3.md b/Documentation/mainboard/acer/g43t-am3.md index 07d23c6dea..79aa8ffd5f 100644 --- a/Documentation/mainboard/acer/g43t-am3.md +++ b/Documentation/mainboard/acer/g43t-am3.md @@ -5,7 +5,7 @@ Acer models Aspire M3800, Aspire M5800 and possibly more. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | Intel G43 (called x4x in coreboot code) | +------------------+--------------------------------------------------+ @@ -69,7 +69,7 @@ Tests were done with SeaBIOS 1.14.0 and slackware64-live from 2019-07-12 ## Flashing coreboot -```eval_rst +```{eval-rst} +-------------------+---------------------+ | Type | Value | +===================+=====================+ @@ -122,7 +122,7 @@ $ sudo flashrom \ -w coreboot.rom ``` -```eval_rst +```{eval-rst} In addition to the information here, please see the :doc:`../../tutorial/flashing_firmware/index`. ``` diff --git a/Documentation/mainboard/amd/pademelon/pademelon.md b/Documentation/mainboard/amd/pademelon/pademelon.md index 5f053d4cc5..22dd7e2541 100644 --- a/Documentation/mainboard/amd/pademelon/pademelon.md +++ b/Documentation/mainboard/amd/pademelon/pademelon.md @@ -33,7 +33,7 @@ Three items are marked in this picture ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------+ | Type | Value | +=====================+====================+ @@ -53,7 +53,7 @@ Three items are marked in this picture ## Technology -```eval_rst +```{eval-rst} +---------------+------------------------------+ | Fan control | Using fintek F81803A | +---------------+------------------------------+ @@ -63,7 +63,7 @@ Three items are marked in this picture ## Description of pictures within this document -```eval_rst +```{eval-rst} +----------------------------+----------------------------------------+ |pademelon.jpg | Motherboard with components identified | +----------------------------+----------------------------------------+ diff --git a/Documentation/mainboard/asrock/h110m-dvs.md b/Documentation/mainboard/asrock/h110m-dvs.md index a4f6e57bca..b3c484ef94 100644 --- a/Documentation/mainboard/asrock/h110m-dvs.md +++ b/Documentation/mainboard/asrock/h110m-dvs.md @@ -11,7 +11,7 @@ Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/inde FSP Information: -```eval_rst +```{eval-rst} +-----------------------------+-------------------+-------------------+ | FSP Project Name | Directory | Specification | +-----------------------------+-------------------+-------------------+ @@ -114,7 +114,7 @@ facing towards the bottom of the board. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Skylake/Kaby Lake (LGA1151) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asrock/h77pro4-m.md b/Documentation/mainboard/asrock/h77pro4-m.md index 81fb000f45..5ad4479fdb 100644 --- a/Documentation/mainboard/asrock/h77pro4-m.md +++ b/Documentation/mainboard/asrock/h77pro4-m.md @@ -5,7 +5,7 @@ Bridge and Ivy Bridge CPUs. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ @@ -71,7 +71,7 @@ extlinux ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -115,7 +115,7 @@ $ sudo flashrom --noverify-all --ifd -i bios -p internal -w coreboot.rom The use of `--noverify-all` is required since the Management Engine region is not readable even by the host. -```eval_rst +```{eval-rst} In addition to the information here, please see the :doc:`../../tutorial/flashing_firmware/index`. ``` diff --git a/Documentation/mainboard/asrock/h81m-hds.md b/Documentation/mainboard/asrock/h81m-hds.md index 9d5c288885..5cbaa7fc55 100644 --- a/Documentation/mainboard/asrock/h81m-hds.md +++ b/Documentation/mainboard/asrock/h81m-hds.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASRock H81M-HDS]. ## Required proprietary blobs -```eval_rst +```{eval-rst} Please see :doc:`../../northbridge/intel/haswell/mrc.bin`. ``` @@ -75,7 +75,7 @@ facing towards the bottom of the board. in coreboot. The `coretemp` driver can still be used for accurate CPU temperature readings from an OS. -```eval_rst +```{eval-rst} Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ``` @@ -111,7 +111,7 @@ Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/haswell/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/a88xm-e.md b/Documentation/mainboard/asus/a88xm-e.md index 77615313e0..dbfb99c9f7 100644 --- a/Documentation/mainboard/asus/a88xm-e.md +++ b/Documentation/mainboard/asus/a88xm-e.md @@ -14,7 +14,7 @@ and their GPU is [Sea Islands] (GCN2-based). A10 Richland is recommended for the best performance and working IOMMU. -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | A88XM-E | | +------------------+--------------------------------------------------+ @@ -36,7 +36,7 @@ A10 Richland is recommended for the best performance and working IOMMU. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/asus/f2a85-m.md b/Documentation/mainboard/asus/f2a85-m.md index ce7c24973d..790a2f7592 100644 --- a/Documentation/mainboard/asus/f2a85-m.md +++ b/Documentation/mainboard/asus/f2a85-m.md @@ -15,7 +15,7 @@ Both "Trinity" and "Richland" desktop processing units are working, the CPU architecture in these CPUs/APUs is [Piledriver], and their GPU is [TeraScale 3] (VLIW4-based). -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | F2A85-M | | +------------------+--------------------------------------------------+ @@ -35,7 +35,7 @@ and their GPU is [TeraScale 3] (VLIW4-based). +------------------+--------------------------------------------------+ ``` -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | F2A85-M LE | | +------------------+--------------------------------------------------+ @@ -55,7 +55,7 @@ and their GPU is [TeraScale 3] (VLIW4-based). +------------------+--------------------------------------------------+ ``` -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | F2A85-M PRO | | +------------------+--------------------------------------------------+ @@ -77,7 +77,7 @@ and their GPU is [TeraScale 3] (VLIW4-based). ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/asus/p2b-ls.md b/Documentation/mainboard/asus/p2b-ls.md index c119993510..c1bb1c4bd9 100644 --- a/Documentation/mainboard/asus/p2b-ls.md +++ b/Documentation/mainboard/asus/p2b-ls.md @@ -10,7 +10,7 @@ This page describes how to run coreboot on the ASUS P2B-LS mainboard. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------------+ | Type | Value | +=====================+===========================+ @@ -90,7 +90,7 @@ for only CPU models that the board will actually be run with. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | Intel I440BX | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p3b-f.md b/Documentation/mainboard/asus/p3b-f.md index 3db20970f7..addc7d9cef 100644 --- a/Documentation/mainboard/asus/p3b-f.md +++ b/Documentation/mainboard/asus/p3b-f.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the ASUS P3B-F mainboard. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------------+ | Type | Value | +=====================+===========================+ @@ -88,7 +88,7 @@ for only CPU models that the board will actually be run with. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | Intel I440BX | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p5q.md b/Documentation/mainboard/asus/p5q.md index ec208876a0..0b5fcb6021 100644 --- a/Documentation/mainboard/asus/p5q.md +++ b/Documentation/mainboard/asus/p5q.md @@ -32,7 +32,7 @@ This page describes how to run coreboot on the [ASUS P5Q] desktop board. ## Flashing coreboot -```eval_rst +```{eval-rst} +-------------------+----------------+ | Type | Value | +===================+================+ @@ -56,7 +56,7 @@ You can flash coreboot into your motherboard using [this guide]. ## Technology -```eval_rst +```{eval-rst} +------------------+---------------------------------------------------+ | Northbridge | Intel P45 (called x4x in coreboot code) | +------------------+---------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8c_ws.md b/Documentation/mainboard/asus/p8c_ws.md index a9aa58974f..63f80acde2 100644 --- a/Documentation/mainboard/asus/p8c_ws.md +++ b/Documentation/mainboard/asus/p8c_ws.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8H77-V]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -69,7 +69,7 @@ flash externally. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8h61-m_lx.md b/Documentation/mainboard/asus/p8h61-m_lx.md index a4b54cd93f..cc0dfb132f 100644 --- a/Documentation/mainboard/asus/p8h61-m_lx.md +++ b/Documentation/mainboard/asus/p8h61-m_lx.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8H61-M LX]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -84,7 +84,7 @@ region is not readable even by the host. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8h61-m_pro.md b/Documentation/mainboard/asus/p8h61-m_pro.md index 713c794b0a..3f9bf366f8 100644 --- a/Documentation/mainboard/asus/p8h61-m_pro.md +++ b/Documentation/mainboard/asus/p8h61-m_pro.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8H61-M Pro]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -78,7 +78,7 @@ region is not readable even by the host. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8h77-v.md b/Documentation/mainboard/asus/p8h77-v.md index 97b84ea7d0..7aec6c3c8f 100644 --- a/Documentation/mainboard/asus/p8h77-v.md +++ b/Documentation/mainboard/asus/p8h77-v.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8H77-V]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -56,7 +56,7 @@ work. The flash chip is socketed, so it's easy to remove and reflash. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8z77-m.md b/Documentation/mainboard/asus/p8z77-m.md index a7011692fb..23b28eec14 100644 --- a/Documentation/mainboard/asus/p8z77-m.md +++ b/Documentation/mainboard/asus/p8z77-m.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8Z77-M]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -112,7 +112,7 @@ therefore they currently do nothing under coreboot. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8z77-m_pro.md b/Documentation/mainboard/asus/p8z77-m_pro.md index 8bfac25541..93400bc0d1 100644 --- a/Documentation/mainboard/asus/p8z77-m_pro.md +++ b/Documentation/mainboard/asus/p8z77-m_pro.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8Z77-M PRO] ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -143,7 +143,7 @@ easy to remove and reflash. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/p8z77-v.md b/Documentation/mainboard/asus/p8z77-v.md index dba02b9435..e6ae9a8018 100644 --- a/Documentation/mainboard/asus/p8z77-v.md +++ b/Documentation/mainboard/asus/p8z77-v.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [ASUS P8Z77-V]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -86,7 +86,7 @@ See [Asus Wi-Fi Go! v1]. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/asus/wifigo_v1.md b/Documentation/mainboard/asus/wifigo_v1.md index d5ad327053..1685c68076 100644 --- a/Documentation/mainboard/asus/wifigo_v1.md +++ b/Documentation/mainboard/asus/wifigo_v1.md @@ -8,7 +8,7 @@ through a proprietary 16-1 pin connector. I managed to grope the most pinout of the proprietary connector. See [Mini PCIe pinout] for more info. -```eval_rst +```{eval-rst} +------------+----------+-----------+------------+----------+-----------+ | WIFIGO Pin | Usage | mPCIe pin | WIFIGO Pin | Usage | mPCIe pin | +============+==========+===========+============+==========+===========+ diff --git a/Documentation/mainboard/cavium/cn8100_sff_evb.md b/Documentation/mainboard/cavium/cn8100_sff_evb.md index b16a8ae19b..4498ca3068 100644 --- a/Documentation/mainboard/cavium/cn8100_sff_evb.md +++ b/Documentation/mainboard/cavium/cn8100_sff_evb.md @@ -17,7 +17,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -58,7 +58,7 @@ ## Technology -```eval_rst +```{eval-rst} +---------------+----------------------------------------+ | SoC | :doc:`../../soc/cavium/cn81xx/index` | +---------------+----------------------------------------+ diff --git a/Documentation/mainboard/clevo/n130wu/index.md b/Documentation/mainboard/clevo/n130wu/index.md index 326756199b..d67ca810f5 100644 --- a/Documentation/mainboard/clevo/n130wu/index.md +++ b/Documentation/mainboard/clevo/n130wu/index.md @@ -2,7 +2,7 @@ ## Hardware ### Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------+ | CPU | Intel i7-8550U | +------------------+--------------------------------+ @@ -15,7 +15,7 @@ ``` ### Flash chip -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/dell/optiplex_9010.md b/Documentation/mainboard/dell/optiplex_9010.md index f22623d9d7..31685913c0 100644 --- a/Documentation/mainboard/dell/optiplex_9010.md +++ b/Documentation/mainboard/dell/optiplex_9010.md @@ -6,7 +6,7 @@ This page describes how to run coreboot on Dell OptiPlex 9010 SFF. ## Technology -```eval_rst +```{eval-rst} +------------+---------------------------------------------------------------+ | CPU | Intel Core 2nd Gen (Sandybridge) or 3rd Gen (Ivybridge) | +------------+---------------------------------------------------------------+ @@ -28,7 +28,7 @@ More specifications on [Dell OptiPlex 9010 specifications]. ## Required proprietary blobs -```eval_rst +```{eval-rst} +------------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +==================+=================================+=====================+ @@ -50,7 +50,7 @@ signature `SMSCUBIM`. The easiest way to do this is to use [UEFITool] and ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------------+ | Type | Value | +=====================+==========================+ diff --git a/Documentation/mainboard/facebook/fbg1701.md b/Documentation/mainboard/facebook/fbg1701.md index 1c72d6c542..0fa3db3efd 100644 --- a/Documentation/mainboard/facebook/fbg1701.md +++ b/Documentation/mainboard/facebook/fbg1701.md @@ -63,7 +63,7 @@ Specifically, it's a Winbond W25Q64FV (3.3V), whose datasheet can be found ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | SoC | Intel Atom Processor N3710 | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/facebook/monolith.md b/Documentation/mainboard/facebook/monolith.md index 90107098c4..da72e48148 100644 --- a/Documentation/mainboard/facebook/monolith.md +++ b/Documentation/mainboard/facebook/monolith.md @@ -14,7 +14,7 @@ Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/inde FSP Information: -```eval_rst +```{eval-rst} +-----------------------------+-------------------+-------------------+ | FSP Project Name | Directory | Specification | +-----------------------------+-------------------+-------------------+ @@ -116,7 +116,7 @@ output. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | SoC | Intel Kaby Lake U | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/foxconn/d41s.md b/Documentation/mainboard/foxconn/d41s.md index fe14057d34..45a86d4548 100644 --- a/Documentation/mainboard/foxconn/d41s.md +++ b/Documentation/mainboard/foxconn/d41s.md @@ -14,7 +14,7 @@ The default options for this board should result in a fully working image: ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------+ | Type | Value | +=====================+========+ @@ -56,7 +56,7 @@ To do this gently take the SPI flash out of its socket and flash with your progr ## Technology -```eval_rst +```{eval-rst} +------------------+------------------+ | Northbridge | Intel Pinevew | +------------------+------------------+ diff --git a/Documentation/mainboard/gigabyte/ga-g41m-es2l.md b/Documentation/mainboard/gigabyte/ga-g41m-es2l.md index 57c4945686..b42cd81fd4 100644 --- a/Documentation/mainboard/gigabyte/ga-g41m-es2l.md +++ b/Documentation/mainboard/gigabyte/ga-g41m-es2l.md @@ -6,7 +6,7 @@ This motherboard [also works with Libreboot](https://libreboot.org/docs/install/ ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Type | Value | +==================+==================================================+ @@ -30,7 +30,7 @@ This motherboard [also works with Libreboot](https://libreboot.org/docs/install/ ## Preparation -```eval_rst +```{eval-rst} For more datails how to get sources and build the toolchain, see :doc:`../../tutorial/part1`. ``` @@ -140,7 +140,7 @@ Built gigabyte/ga-g41m-es2l (GA-G41M-ES2L) ## Flashing coreboot -```eval_rst +```{eval-rst} In addition to the information here, please see the :doc:`../../tutorial/flashing_firmware/index`. ``` diff --git a/Documentation/mainboard/gigabyte/ga-h61m-s2pv.md b/Documentation/mainboard/gigabyte/ga-h61m-s2pv.md index 0632585c73..824026fe72 100644 --- a/Documentation/mainboard/gigabyte/ga-h61m-s2pv.md +++ b/Documentation/mainboard/gigabyte/ga-h61m-s2pv.md @@ -5,7 +5,7 @@ from [Gigabyte]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -59,7 +59,7 @@ However, this makes DualBIOS unable to recover from a bad flash for some reason. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/2170p.md b/Documentation/mainboard/hp/2170p.md index 5f67c38b11..6b8060e195 100644 --- a/Documentation/mainboard/hp/2170p.md +++ b/Documentation/mainboard/hp/2170p.md @@ -74,7 +74,7 @@ The EHCI debug port is the left USB3 port. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Sandy/Ivy Bridge (FCPGA988) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/2560p.md b/Documentation/mainboard/hp/2560p.md index 65a87d1068..4565171c0e 100644 --- a/Documentation/mainboard/hp/2560p.md +++ b/Documentation/mainboard/hp/2560p.md @@ -80,7 +80,7 @@ Schematic of this laptop can be found on [Lab One]. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Sandy/Ivy Bridge (FCPGA988) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/8760w.md b/Documentation/mainboard/hp/8760w.md index 857a1d9558..9646ba9163 100644 --- a/Documentation/mainboard/hp/8760w.md +++ b/Documentation/mainboard/hp/8760w.md @@ -7,7 +7,7 @@ checkout the [code on gerrit] to build coreboot for the laptop. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -66,7 +66,7 @@ clip to read and flash the chip. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/compaq_8200_sff.md b/Documentation/mainboard/hp/compaq_8200_sff.md index 72df9e3e02..f0783975dd 100644 --- a/Documentation/mainboard/hp/compaq_8200_sff.md +++ b/Documentation/mainboard/hp/compaq_8200_sff.md @@ -13,7 +13,7 @@ The following things are still missing from this coreboot port: ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------------------+ | Type | Value | +=====================+=========================+ @@ -128,7 +128,7 @@ as otherwise there's not enough space near the flash. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/compaq_8300_usdt.md b/Documentation/mainboard/hp/compaq_8300_usdt.md index c2800b3f3f..4c2989a3a5 100644 --- a/Documentation/mainboard/hp/compaq_8300_usdt.md +++ b/Documentation/mainboard/hp/compaq_8300_usdt.md @@ -5,7 +5,7 @@ from [HP]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------+ | Type | Value | +=====================+=============+ @@ -42,7 +42,7 @@ Wake on LAN is active works great. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/elitebook_820_g2.md b/Documentation/mainboard/hp/elitebook_820_g2.md index 5d35c30211..6fafbe1758 100644 --- a/Documentation/mainboard/hp/elitebook_820_g2.md +++ b/Documentation/mainboard/hp/elitebook_820_g2.md @@ -124,7 +124,7 @@ The board can be debugged with EHCI debug. The EHCI debug port is the USB port o ## Technology -```eval_rst +```{eval-rst} +------------------+-----------------------------+ | SoC | Intel Broadwell | +------------------+-----------------------------+ diff --git a/Documentation/mainboard/hp/folio_9480m.md b/Documentation/mainboard/hp/folio_9480m.md index 0fededfda4..912bf93664 100644 --- a/Documentation/mainboard/hp/folio_9480m.md +++ b/Documentation/mainboard/hp/folio_9480m.md @@ -138,7 +138,7 @@ The board can be debugged with EHCI debug. The EHCI debug port is the USB port o ## Technology -```eval_rst +```{eval-rst} +------------------+-----------------------------+ | CPU | Intel Haswell-ULT | +------------------+-----------------------------+ diff --git a/Documentation/mainboard/hp/z220_sff.md b/Documentation/mainboard/hp/z220_sff.md index 11676208ac..303b59aecf 100644 --- a/Documentation/mainboard/hp/z220_sff.md +++ b/Documentation/mainboard/hp/z220_sff.md @@ -13,7 +13,7 @@ The following things are still missing from this coreboot port: ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------+ | Type | Value | +=====================+=============+ @@ -58,7 +58,7 @@ even interchangeable, so should do coreboot images built for them. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 519d88873c..6178738645 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -4,240 +4,392 @@ This section contains documentation about coreboot on specific mainboards. ## 51NB -- [X210](51nb/x210.md) +```{toctree} +:maxdepth: 1 + +X210 <51nb/x210.md> +``` ## Acer -- [G43T-AM3](acer/g43t-am3.md) +```{toctree} +:maxdepth: 1 + +G43T-AM3 <acer/g43t-am3.md> +``` ## AMD -- [pademelon](amd/pademelon/pademelon.md) +```{toctree} +:maxdepth: 1 + +pademelon <amd/pademelon/pademelon.md> +``` ## ASRock -- [H77 Pro4-M](asrock/h77pro4-m.md) -- [H81M-HDS](asrock/h81m-hds.md) -- [H110M-DVS](asrock/h110m-dvs.md) +```{toctree} +:maxdepth: 1 + +H77 Pro4-M <asrock/h77pro4-m.md> +H81M-HDS <asrock/h81m-hds.md> +H110M-DVS <asrock/h110m-dvs.md> +``` ## ASUS -- [A88XM-E](asus/a88xm-e.md) -- [F2A85-M](asus/f2a85-m.md) -- [P2B-LS](asus/p2b-ls.md) -- [P3B-F](asus/p3b-f.md) -- [P5Q](asus/p5q.md) -- [P8C WS](asus/p8c_ws.md) -- [P8H61-M LX](asus/p8h61-m_lx.md) -- [P8H61-M Pro](asus/p8h61-m_pro.md) -- [P8H77-V](asus/p8h77-v.md) -- [P8Z77-M](asus/p8z77-m.md) -- [P8Z77-M Pro](asus/p8z77-m_pro.md) -- [P8Z77-V](asus/p8z77-v.md) -- [wifigo_v1](asus/wifigo_v1.md) +```{toctree} +:maxdepth: 1 + +A88XM-E <asus/a88xm-e.md> +F2A85-M <asus/f2a85-m.md> +P2B-LS <asus/p2b-ls.md> +P3B-F <asus/p3b-f.md> +P5Q <asus/p5q.md> +P8C WS <asus/p8c_ws.md> +P8H61-M LX <asus/p8h61-m_lx.md> +P8H61-M Pro <asus/p8h61-m_pro.md> +P8H77-V <asus/p8h77-v.md> +P8Z77-M <asus/p8z77-m.md> +P8Z77-M Pro <asus/p8z77-m_pro.md> +P8Z77-V <asus/p8z77-v.md> +wifigo_v1 <asus/wifigo_v1.md> +``` ## Cavium -- [CN81XX EVB SFF](cavium/cn8100_sff_evb.md) +```{toctree} +:maxdepth: 1 + +CN81XX EVB SFF <cavium/cn8100_sff_evb.md> +``` ## Clevo -- [N130WU / N131WU](clevo/n130wu/index.md) +```{toctree} +:maxdepth: 1 + +N130WU / N131WU <clevo/n130wu/index.md> +``` ## Dell -- [OptiPlex 9010 SFF](dell/optiplex_9010.md) +```{toctree} +:maxdepth: 1 + +OptiPlex 9010 SFF <dell/optiplex_9010.md> +``` ## Emulation The boards in this section are not real mainboards, but emulators. -- [Spike RISC-V emulator](emulation/spike-riscv.md) -- [QEMU RISC-V emulator](emulation/qemu-riscv.md) -- [QEMU AArch64 emulator](emulation/qemu-aarch64.md) -- [QEMU x86 Q35](emulation/qemu-q35.md) -- [QEMU x86 PC](emulation/qemu-i440fx.md) -- [QEMU POWER9](emulation/qemu-power9.md) +```{toctree} +:maxdepth: 1 + +Spike RISC-V emulator <emulation/spike-riscv.md> +QEMU RISC-V emulator <emulation/qemu-riscv.md> +QEMU AArch64 emulator <emulation/qemu-aarch64.md> +QEMU x86 Q35 <emulation/qemu-q35.md> +QEMU x86 PC <emulation/qemu-i440fx.md> +QEMU POWER9 <emulation/qemu-power9.md> +``` ## Facebook -- [FBG-1701](facebook/fbg1701.md) -- [Monolith](facebook/monolith.md) +```{toctree} +:maxdepth: 1 + +FBG-1701 <facebook/fbg1701.md> +Monolith <facebook/monolith.md> +``` ## Foxconn -- [D41S](foxconn/d41s.md) +```{toctree} +:maxdepth: 1 + +D41S <foxconn/d41s.md> +``` ## Gigabyte -- [GA-G41M-ES2L](gigabyte/ga-g41m-es2l.md) -- [GA-H61M-S2PV](gigabyte/ga-h61m-s2pv.md) +```{toctree} +:maxdepth: 1 + +GA-G41M-ES2L <gigabyte/ga-g41m-es2l.md> +GA-H61M-S2PV <gigabyte/ga-h61m-s2pv.md> +``` ## HP -- [Compaq 8200 Elite SFF](hp/compaq_8200_sff.md) -- [Compaq Elite 8300 USDT](hp/compaq_8300_usdt.md) -- [Z220 Workstation SFF](hp/z220_sff.md) +```{toctree} +:maxdepth: 1 + +Compaq 8200 Elite SFF <hp/compaq_8200_sff.md> +Compaq Elite 8300 USDT <hp/compaq_8300_usdt.md> +Z220 Workstation SFF <hp/z220_sff.md> +``` ### EliteBook series -- [HP Laptops with KBC1126 EC](hp/hp_kbc1126_laptops.md) -- [HP Sure Start](hp/hp_sure_start.md) -- [EliteBook 2170p](hp/2170p.md) -- [EliteBook 2560p](hp/2560p.md) -- [EliteBook 8760w](hp/8760w.md) -- [EliteBook Folio 9480m](hp/folio_9480m.md) -- [EliteBook 820 G2](hp/elitebook_820_g2.md) +```{toctree} +:maxdepth: 1 + +HP Laptops with KBC1126 EC <hp/hp_kbc1126_laptops.md> +HP Sure Start <hp/hp_sure_start.md> +EliteBook 2170p <hp/2170p.md> +EliteBook 2560p <hp/2560p.md> +EliteBook 8760w <hp/8760w.md> +EliteBook Folio 9480m <hp/folio_9480m.md> +EliteBook 820 G2 <hp/elitebook_820_g2.md> +``` ## Intel -- [DG43GT](intel/dg43gt.md) -- [DQ67SW](intel/dq67sw.md) -- [KBLRVP11](intel/kblrvp11.md) +```{toctree} +:maxdepth: 1 + +DG43GT <intel/dg43gt.md> +DQ67SW <intel/dq67sw.md> +KBLRVP11 <intel/kblrvp11.md> +``` ## Kontron -- [mAL-10](kontron/mal10.md) +```{toctree} +:maxdepth: 1 + +mAL-10 <kontron/mal10.md> +``` ## Lenovo -- [Mainboard codenames](lenovo/codenames.md) -- [Hardware Maintenance Manual of ThinkPads](lenovo/thinkpad_hmm.md) -- [R60](lenovo/r60.md) -- [T4xx common](lenovo/t4xx_series.md) -- [X2xx common](lenovo/x2xx_series.md) -- [vboot](lenovo/vboot.md) +```{toctree} +:maxdepth: 1 + +Mainboard codenames <lenovo/codenames.md> +Hardware Maintenance Manual of ThinkPads <lenovo/thinkpad_hmm.md> +R60 <lenovo/r60.md> +T4xx common <lenovo/t4xx_series.md> +X2xx common <lenovo/x2xx_series.md> +vboot <lenovo/vboot.md> +``` ### GM45 series -- [X200 / T400 / T500 / X301 common](lenovo/montevina_series.md) -- [X301](lenovo/x301.md) +```{toctree} +:maxdepth: 1 + +X200 / T400 / T500 / X301 common <lenovo/montevina_series.md> +X301 <lenovo/x301.md> +``` ### Arrandale series -- [T410](lenovo/t410.md) +```{toctree} +:maxdepth: 1 + +T410 <lenovo/t410.md> +``` ### Sandy Bridge series -- [T420](lenovo/t420.md) -- [T420 / T520 / X220 / T420s / W520 common](lenovo/Sandy_Bridge_series.md) -- [X1](lenovo/x1.md) +```{toctree} +:maxdepth: 1 + +T420 <lenovo/t420.md> +T420 / T520 / X220 / T420s / W520 common <lenovo/Sandy_Bridge_series.md> +X1 <lenovo/x1.md> +``` ### Ivy Bridge series -- [T430](lenovo/t430.md) -- [T530 / W530](lenovo/w530.md) -- [T430 / T530 / X230 / W530 common](lenovo/Ivy_Bridge_series.md) -- [T431s](lenovo/t431s.md) -- [X230s](lenovo/x230s.md) -- [Internal flashing](lenovo/ivb_internal_flashing.md) +```{toctree} +:maxdepth: 1 + +T430 <lenovo/t430.md> +T530 / W530 <lenovo/w530.md> +T430 / T530 / X230 / W530 common <lenovo/Ivy_Bridge_series.md> +T431s <lenovo/t431s.md> +X230s <lenovo/x230s.md> +Internal flashing <lenovo/ivb_internal_flashing.md> +``` ### Haswell series -- [T440p](lenovo/t440p.md) +```{toctree} +:maxdepth: 1 + +T440p <lenovo/t440p.md> +``` ## Libretrend -- [LT1000](libretrend/lt1000.md) +```{toctree} +:maxdepth: 1 + +LT1000 <libretrend/lt1000.md> +``` ## MSI -- [MS-7707](msi/ms7707/ms7707.md) +```{toctree} +:maxdepth: 1 + +MS-7707 <msi/ms7707/ms7707.md> +``` ## OCP -- [Delta Lake](ocp/deltalake.md) -- [Tioga Pass](ocp/tiogapass.md) +```{toctree} +:maxdepth: 1 + +Delta Lake <ocp/deltalake.md> +Tioga Pass <ocp/tiogapass.md> +``` ## Open Cellular -- [Elgon](opencellular/elgon.md) +```{toctree} +:maxdepth: 1 + +Elgon <opencellular/elgon.md> +``` ## PC Engines -- [APU1](pcengines/apu1.md) -- [APU2](pcengines/apu2.md) +```{toctree} +:maxdepth: 1 + +APU1 <pcengines/apu1.md> +APU2 <pcengines/apu2.md> +``` ## Portwell -- [PQ7-M107](portwell/pq7-m107.md) +```{toctree} +:maxdepth: 1 + +PQ7-M107 <portwell/pq7-m107.md> +``` ## Prodrive -- [Hermes](prodrive/hermes.md) +```{toctree} +:maxdepth: 1 + +Hermes <prodrive/hermes.md> +``` ## Purism -- [Librem 14](purism/librem_14.md) -- [Librem Mini](purism/librem_mini.md) +```{toctree} +:maxdepth: 1 + +Librem 14 <purism/librem_14.md> +Librem Mini <purism/librem_mini.md> +``` ## Protectli -- [FW2B / FW4B](protectli/fw2b_fw4b.md) -- [FW6A / FW6B / FW6C](protectli/fw6.md) -- [VP2420](protectli/vp2420.md) -- [VP4630 / VP4650 / VP4670](protectli/vp46xx.md) +```{toctree} +:maxdepth: 1 + +FW2B / FW4B <protectli/fw2b_fw4b.md> +FW6A / FW6B / FW6C <protectli/fw6.md> +VP2420 <protectli/vp2420.md> +VP4630 / VP4650 / VP4670 <protectli/vp46xx.md> +``` ## Roda -- [RK9 Flash Header](roda/rk9/flash_header.md) +```{toctree} +:maxdepth: 1 + +RK9 Flash Header <roda/rk9/flash_header.md> +``` ## SiFive -- [SiFive HiFive Unleashed](sifive/hifive-unleashed.md) +```{toctree} +:maxdepth: 1 + +SiFive HiFive Unleashed <sifive/hifive-unleashed.md> +``` ## Star Labs Systems -- [LabTop Mk III](starlabs/labtop_kbl.md) -- [LabTop Mk IV](starlabs/labtop_cml.md) -- [StarLite Mk III](starlabs/lite_glk.md) -- [StarLite Mk IV](starlabs/lite_glkr.md) -- [StarBook Mk V](starlabs/starbook_tgl.md) -- [StarBook Mk VI](starlabs/starbook_adl.md) -- [Flashing devices](starlabs/common/flashing.md) +```{toctree} +:maxdepth: 1 + +LabTop Mk III <starlabs/labtop_kbl.md> +LabTop Mk IV <starlabs/labtop_cml.md> +StarLite Mk III <starlabs/lite_glk.md> +StarLite Mk IV <starlabs/lite_glkr.md> +StarBook Mk V <starlabs/starbook_tgl.md> +StarBook Mk VI <starlabs/starbook_adl.md> +Flashing devices <starlabs/common/flashing.md> +``` ## Supermicro -- [X9SAE](supermicro/x9sae.md) -- [X10SLM+-F](supermicro/x10slm-f.md) -- [X11 LGA1151 series](supermicro/x11-lga1151-series/x11-lga1151-series.md) -- [Flashing using the BMC](supermicro/flashing_on_vendorbmc.md) +```{toctree} +:maxdepth: 1 + +X9SAE <supermicro/x9sae.md> +X10SLM+-F <supermicro/x10slm-f.md> +X11 LGA1151 series <supermicro/x11-lga1151-series/x11-lga1151-series.md> +Flashing using the BMC <supermicro/flashing_on_vendorbmc.md> +``` ## System76 -- [Adder Workstation 1](system76/addw1.md) -- [Adder Workstation 2](system76/addw2.md) -- [Adder Workstation 3](system76/addw3.md) -- [Bonobo Workstation 14](system76/bonw14.md) -- [Bonobo Workstation 15](system76/bonw15.md) -- [Darter Pro 6](system76/darp6.md) -- [Darter Pro 7](system76/darp7.md) -- [Darter Pro 8](system76/darp8.md) -- [Darter Pro 9](system76/darp9.md) -- [Galago Pro 4](system76/galp4.md) -- [Galago Pro 5](system76/galp5.md) -- [Galago Pro 6](system76/galp6.md) -- [Galago Pro 7](system76/galp7.md) -- [Gazelle 15](system76/gaze15.md) -- [Gazelle 16](system76/gaze16.md) -- [Gazelle 17](system76/gaze17.md) -- [Gazelle 18](system76/gaze18.md) -- [Lemur Pro 9](system76/lemp9.md) -- [Lemur Pro 10](system76/lemp10.md) -- [Lemur Pro 11](system76/lemp11.md) -- [Lemur Pro 12](system76/lemp12.md) -- [Oryx Pro 5](system76/oryp5.md) -- [Oryx Pro 6](system76/oryp6.md) -- [Oryx Pro 7](system76/oryp7.md) -- [Oryx Pro 8](system76/oryp8.md) -- [Oryx Pro 9](system76/oryp9.md) -- [Oryx Pro 10](system76/oryp10.md) -- [Oryx Pro 11](system76/oryp11.md) -- [Serval Workstation 13](system76/serw13.md) +```{toctree} +:maxdepth: 1 + +Adder Workstation 1 <system76/addw1.md> +Adder Workstation 2 <system76/addw2.md> +Adder Workstation 3 <system76/addw3.md> +Bonobo Workstation 14 <system76/bonw14.md> +Bonobo Workstation 15 <system76/bonw15.md> +Darter Pro 6 <system76/darp6.md> +Darter Pro 7 <system76/darp7.md> +Darter Pro 8 <system76/darp8.md> +Darter Pro 9 <system76/darp9.md> +Galago Pro 4 <system76/galp4.md> +Galago Pro 5 <system76/galp5.md> +Galago Pro 6 <system76/galp6.md> +Galago Pro 7 <system76/galp7.md> +Gazelle 15 <system76/gaze15.md> +Gazelle 16 <system76/gaze16.md> +Gazelle 17 <system76/gaze17.md> +Gazelle 18 <system76/gaze18.md> +Lemur Pro 9 <system76/lemp9.md> +Lemur Pro 10 <system76/lemp10.md> +Lemur Pro 11 <system76/lemp11.md> +Lemur Pro 12 <system76/lemp12.md> +Oryx Pro 5 <system76/oryp5.md> +Oryx Pro 6 <system76/oryp6.md> +Oryx Pro 7 <system76/oryp7.md> +Oryx Pro 8 <system76/oryp8.md> +Oryx Pro 9 <system76/oryp9.md> +Oryx Pro 10 <system76/oryp10.md> +Oryx Pro 11 <system76/oryp11.md> +Serval Workstation 13 <system76/serw13.md> +``` ## Texas Instruments -- [Beaglebone Black](ti/beaglebone-black.md) +```{toctree} +:maxdepth: 1 + +Beaglebone Black <ti/beaglebone-black.md> +``` ## UP -- [Squared](up/squared/index.md) +```{toctree} +:maxdepth: 1 + +Squared <up/squared/index.md> +``` diff --git a/Documentation/mainboard/intel/dg43gt.md b/Documentation/mainboard/intel/dg43gt.md index fac08bda68..fe488a42d5 100644 --- a/Documentation/mainboard/intel/dg43gt.md +++ b/Documentation/mainboard/intel/dg43gt.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the [Intel DG43GT] desktop. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -79,7 +79,7 @@ The layout of the header is: ## Technology -```eval_rst +```{eval-rst} +------------------+---------------------------------------------------+ | Northbridge | Intel G43 (called x4x in coreboot code) | +------------------+---------------------------------------------------+ diff --git a/Documentation/mainboard/intel/dq67sw.md b/Documentation/mainboard/intel/dq67sw.md index b3ed9b8d0d..d641fc633b 100644 --- a/Documentation/mainboard/intel/dq67sw.md +++ b/Documentation/mainboard/intel/dq67sw.md @@ -4,7 +4,7 @@ The Intel DQ67SW is a microATX-sized desktop board for Intel Sandy Bridge CPUs. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ @@ -67,7 +67,7 @@ The Intel DQ67SW is a microATX-sized desktop board for Intel Sandy Bridge CPUs. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -104,7 +104,7 @@ the PCI configuration space of the LPC Interface Bridge, is set. It is possible to program the chip is to attach an external programmer with an SOIC-8 clip. -```eval_rst +```{eval-rst} Another way is to boot the vendor firmware in UEFI mode and exploit the unpatched S3 Boot Script vulnerability. See this page for a similar procedure: :doc:`../lenovo/ivb_internal_flashing`. @@ -126,7 +126,7 @@ The boot script contains an entry that writes 0x02 to memory at address Interface Bridge [0][1]. The value 0x02 sets the BLE bit, and the modification prevents this by making it write a 0 instead. -```eval_rst +```{eval-rst} After suspending and resuming the board, the BIOS region can be flashed with a coreboot image, e.g. using flashrom. Note that the ME region is not readable, so the `--noverify-all` flag is necessary. Please refer to the diff --git a/Documentation/mainboard/intel/kblrvp11.md b/Documentation/mainboard/intel/kblrvp11.md index d536bead91..32cc5dec28 100644 --- a/Documentation/mainboard/intel/kblrvp11.md +++ b/Documentation/mainboard/intel/kblrvp11.md @@ -23,7 +23,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -65,7 +65,7 @@ $ flashrom -p internal --ifd -i bios -w coreboot.rom --noverify-all ## Technology -```eval_rst +```{eval-rst} +------------------+---------------------------------------------------+ | CPU | Kaby lake H (i7-7820EQ) | +------------------+---------------------------------------------------+ diff --git a/Documentation/mainboard/kontron/mal10.md b/Documentation/mainboard/kontron/mal10.md index e107864962..62ef521a76 100644 --- a/Documentation/mainboard/kontron/mal10.md +++ b/Documentation/mainboard/kontron/mal10.md @@ -6,7 +6,7 @@ processors. ## Technology -```eval_rst +```{eval-rst} +------------------+----------------------------------+ | COMe Type | mini pin-out type 10 | +------------------+----------------------------------+ diff --git a/Documentation/mainboard/lenovo/Ivy_Bridge_series.md b/Documentation/mainboard/lenovo/Ivy_Bridge_series.md index bf49f5d5fd..73d38fe371 100644 --- a/Documentation/mainboard/lenovo/Ivy_Bridge_series.md +++ b/Documentation/mainboard/lenovo/Ivy_Bridge_series.md @@ -3,7 +3,7 @@ This information is valid for all supported models, except T430s, [T431s](t431s.md) and [X230s](x230s.md). ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------------------+ | Type | Value | +=====================+================================+ @@ -37,7 +37,7 @@ This information is valid for all supported models, except T430s, [T431s](t431s. exceed 4MiB in size, which means CONFIG_CBFS_SIZE must be smaller than 4MiB. * ROM chip size should be set to 12MiB. -```eval_rst +```{eval-rst} Please also have a look at :doc:`../../tutorial/flashing_firmware/index`. ``` diff --git a/Documentation/mainboard/lenovo/Sandy_Bridge_series.md b/Documentation/mainboard/lenovo/Sandy_Bridge_series.md index 2a53df3b8c..0294aae827 100644 --- a/Documentation/mainboard/lenovo/Sandy_Bridge_series.md +++ b/Documentation/mainboard/lenovo/Sandy_Bridge_series.md @@ -1,7 +1,7 @@ # Lenovo Sandy Bridge series ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------+ | Type | Value | +=====================+====================+ diff --git a/Documentation/mainboard/lenovo/codenames.md b/Documentation/mainboard/lenovo/codenames.md index 8552294588..a5f70d6125 100644 --- a/Documentation/mainboard/lenovo/codenames.md +++ b/Documentation/mainboard/lenovo/codenames.md @@ -1,6 +1,6 @@ # Lenovo mainboard codenames -```eval_rst +```{eval-rst} .. csv-table:: :header: "Marketing name", "Development codename" :file: codenames.csv diff --git a/Documentation/mainboard/lenovo/ivb_internal_flashing.md b/Documentation/mainboard/lenovo/ivb_internal_flashing.md index 40afd6fc07..a6004a7558 100644 --- a/Documentation/mainboard/lenovo/ivb_internal_flashing.md +++ b/Documentation/mainboard/lenovo/ivb_internal_flashing.md @@ -19,7 +19,11 @@ that was discovered and fixed later. - USB drive (in case you need to downgrade BIOS) - Linux install that (can be) loaded in UEFI mode -- [CHIPSEC](https://github.com/chipsec/chipsec) +```{toctree} +:maxdepth: 1 + +CHIPSEC <https://github.com/chipsec/chipsec> +``` ## BIOS versions @@ -27,7 +31,7 @@ Below is a table of BIOS versions that are vulnerable enough for our goals, per model. The version number means that you need to downgrade to that or earlier version. -```eval_rst +```{eval-rst} +------------+--------------+ | Model | BIOS version | +============+==============+ diff --git a/Documentation/mainboard/lenovo/montevina_series.md b/Documentation/mainboard/lenovo/montevina_series.md index 3ff20426b0..e4e5da3c5f 100644 --- a/Documentation/mainboard/lenovo/montevina_series.md +++ b/Documentation/mainboard/lenovo/montevina_series.md @@ -20,7 +20,7 @@ touch any other regions: ## Installing without ME firmware -```eval_rst +```{eval-rst} .. Note:: **ThinkPad R500** has slightly different flash layout (it doesn't have ``gbe`` region), so the process would be a little different for that model. @@ -51,7 +51,7 @@ your backup with **ifdtool**](#modifying-flash-descriptor-using-ifdtool), or Pick the layout according to your chip size from the table below and save it to the `new_layout.txt` file: -```eval_rst +```{eval-rst} +---------------------------+---------------------------+---------------------------+ | 4 MiB chip | 8 MiB chip | 16 MiB chip | +===========================+===========================+===========================+ @@ -102,7 +102,7 @@ $ make If your flash is not 8 MiB, you need to change values of `flcomp_density1` and `flreg1_limit` in the `ifd-x200.set` file according to following table: -```eval_rst +```{eval-rst} +-----------------+-------+-------+--------+ | | 4 MiB | 8 MiB | 16 MiB | +=================+=======+=======+========+ @@ -144,7 +144,7 @@ Then build coreboot and flash whole `build/coreboot.rom` to the chip. The flash layouts of the OEM firmware are as follows: -```eval_rst +```{eval-rst} +---------------------------------+---------------------------------+ | 4 MiB chip | 8 MiB chip | +=================================+=================================+ diff --git a/Documentation/mainboard/lenovo/t410.md b/Documentation/mainboard/lenovo/t410.md index 80d54f83eb..0112607e1e 100644 --- a/Documentation/mainboard/lenovo/t410.md +++ b/Documentation/mainboard/lenovo/t410.md @@ -5,7 +5,7 @@ * TPM not working with VBOOT and C_ENV bootblock (works without C_ENV BB) ## Flashing instructions -```eval_rst +```{eval-rst} +---------------------+--------------------------------+ | Type | Value | +=====================+================================+ diff --git a/Documentation/mainboard/libretrend/lt1000.md b/Documentation/mainboard/libretrend/lt1000.md index 78d5fc056c..4b13d469e0 100644 --- a/Documentation/mainboard/libretrend/lt1000.md +++ b/Documentation/mainboard/libretrend/lt1000.md @@ -10,7 +10,7 @@ Librebox). To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -98,7 +98,7 @@ The platform contains an LR-i7S65T1 baseboard (LR-i7S65T2 with two NICs not sold yet). More details on [baseboard site]. Unfortunately the board manual is not publicly available. -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i7-6500U | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/msi/ms7707/ms7707.md b/Documentation/mainboard/msi/ms7707/ms7707.md index c92e674270..4f4baf6b23 100644 --- a/Documentation/mainboard/msi/ms7707/ms7707.md +++ b/Documentation/mainboard/msi/ms7707/ms7707.md @@ -9,7 +9,7 @@ * IME 7.0.4.1197 ## Flash chip (Winbond 25Q32BV) -```eval_rst +```{eval-rst} +---------------------+--------------------+ | Type | Value | +=====================+====================+ diff --git a/Documentation/mainboard/ocp/deltalake.md b/Documentation/mainboard/ocp/deltalake.md index d4c06568fa..404052c7ad 100644 --- a/Documentation/mainboard/ocp/deltalake.md +++ b/Documentation/mainboard/ocp/deltalake.md @@ -200,7 +200,7 @@ and [u-root] as initramfs. ## Technology -```eval_rst +```{eval-rst} +------------------------+---------------------------------------------+ | Processor (1 socket) | Intel Cooper Lake Scalable Processor | +------------------------+---------------------------------------------+ diff --git a/Documentation/mainboard/ocp/tiogapass.md b/Documentation/mainboard/ocp/tiogapass.md index 8c49923791..0cbf865696 100644 --- a/Documentation/mainboard/ocp/tiogapass.md +++ b/Documentation/mainboard/ocp/tiogapass.md @@ -80,7 +80,7 @@ u-root. ## Technology -```eval_rst +```{eval-rst} +------------------------+---------------------------------------------+ | Processor (2 sockets) | Intel Skylake Scalable Processor LGA3647 | +------------------------+---------------------------------------------+ diff --git a/Documentation/mainboard/opencellular/elgon.md b/Documentation/mainboard/opencellular/elgon.md index 02225a28a6..9fd30e859d 100644 --- a/Documentation/mainboard/opencellular/elgon.md +++ b/Documentation/mainboard/opencellular/elgon.md @@ -9,7 +9,7 @@ from [OpenCellular]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -69,7 +69,7 @@ Dediprog compatible pinout. ## Technology -```eval_rst +```{eval-rst} +---------------+----------------------------------------+ | SoC | :doc:`../../soc/cavium/cn81xx/index` | +---------------+----------------------------------------+ diff --git a/Documentation/mainboard/pcengines/apu1.md b/Documentation/mainboard/pcengines/apu1.md index ccadd63a61..fa59801ad0 100644 --- a/Documentation/mainboard/pcengines/apu1.md +++ b/Documentation/mainboard/pcengines/apu1.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on PC Engines APU1 platform. ## Technology -```eval_rst +```{eval-rst} +------------+--------------------------------------------------------+ | CPU | AMD G series T40E APU | +------------+--------------------------------------------------------+ @@ -23,7 +23,7 @@ This page describes how to run coreboot on PC Engines APU1 platform. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------------+ | Type | Value | +=====================+==========================+ diff --git a/Documentation/mainboard/pcengines/apu2.md b/Documentation/mainboard/pcengines/apu2.md index 4a02e12f77..caa26cc3e5 100644 --- a/Documentation/mainboard/pcengines/apu2.md +++ b/Documentation/mainboard/pcengines/apu2.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on PC Engines APU2 platform. ## Technology -```eval_rst +```{eval-rst} +------------+---------------------------------------------------------------+ | CPU | AMD G series GX-412TC | +------------+---------------------------------------------------------------+ @@ -25,7 +25,7 @@ This page describes how to run coreboot on PC Engines APU2 platform. To build working coreboot image some blobs are needed. -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -41,7 +41,7 @@ blobs are listed and available is: *3rdparty/southbridge/amd/avalon/PSP* ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+--------------------------+ | Type | Value | +=====================+==========================+ diff --git a/Documentation/mainboard/portwell/pq7-m107.md b/Documentation/mainboard/portwell/pq7-m107.md index 0350ac3652..5d719eaac0 100644 --- a/Documentation/mainboard/portwell/pq7-m107.md +++ b/Documentation/mainboard/portwell/pq7-m107.md @@ -61,7 +61,7 @@ serial/video/pcie ports might be available. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | SoC | Intel Atom Processor N3710 | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/prodrive/hermes.md b/Documentation/mainboard/prodrive/hermes.md index 3b73ee0ed1..726382c295 100644 --- a/Documentation/mainboard/prodrive/hermes.md +++ b/Documentation/mainboard/prodrive/hermes.md @@ -32,7 +32,7 @@ The board features: ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | CoffeeLake + CoffeeLake R (Core + Xeon) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/protectli/fw2b_fw4b.md b/Documentation/mainboard/protectli/fw2b_fw4b.md index e7d5cbfcc9..dec990906d 100644 --- a/Documentation/mainboard/protectli/fw2b_fw4b.md +++ b/Documentation/mainboard/protectli/fw2b_fw4b.md @@ -9,7 +9,7 @@ This page describes how to run coreboot on the [Protectli FW2B] and To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -91,7 +91,7 @@ connected via [FE1.1 USB 2.0 hub]. - FW2B: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Celeron J3060 | +------------------+--------------------------------------------------+ @@ -107,7 +107,7 @@ connected via [FE1.1 USB 2.0 hub]. - FW4B: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Celeron J3160 | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/protectli/fw6.md b/Documentation/mainboard/protectli/fw6.md index 86449d1cf1..6448486665 100644 --- a/Documentation/mainboard/protectli/fw6.md +++ b/Documentation/mainboard/protectli/fw6.md @@ -9,7 +9,7 @@ This page describes how to run coreboot on the [Protectli FW6]. To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -92,7 +92,7 @@ used SoC. - FW6A: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Celeron 3865U | +------------------+--------------------------------------------------+ @@ -106,7 +106,7 @@ used SoC. - FW6B: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i3-7100U | +------------------+--------------------------------------------------+ @@ -120,7 +120,7 @@ used SoC. - FW6C: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i5-7200U | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/protectli/vp2420.md b/Documentation/mainboard/protectli/vp2420.md index 68b5da0d61..b5a7ff67d0 100644 --- a/Documentation/mainboard/protectli/vp2420.md +++ b/Documentation/mainboard/protectli/vp2420.md @@ -10,7 +10,7 @@ This page describes how to run coreboot on the [Protectli VP2420]. To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -66,7 +66,7 @@ MX25L12835F - [datasheet][MX25L12835F]. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Celeron J6412 | +------------------+--------------------------------------------------+ @@ -80,8 +80,12 @@ MX25L12835F - [datasheet][MX25L12835F]. ## Useful links -- [VP2420 Hardware Overview](https://protectli.com/kb/vp2400-series-hardware-overview/) -- [VP2420 Product Page](https://protectli.com/product/vp2420/) -- [Protectli TPM module](https://protectli.com/product/tpm-module/) -- [MX25L12835F](https://www.mxic.com.tw/Lists/Datasheet/Attachments/8653/MX25L12835F,%203V,%20128Mb,%20v1.6.pdf) -- [flashrom](https://flashrom.org/Flashrom) +```{toctree} +:maxdepth: 1 + +VP2420 Hardware Overview <https://protectli.com/kb/vp2400-series-hardware-overview/> +VP2420 Product Page <https://protectli.com/product/vp2420/> +Protectli TPM module <https://protectli.com/product/tpm-module/> +MX25L12835F <https://www.mxic.com.tw/Lists/Datasheet/Attachments/8653/MX25L12835F,%203V,%20128Mb,%20v1.6.pdf> +flashrom <https://flashrom.org/Flashrom> +``` diff --git a/Documentation/mainboard/protectli/vp46xx.md b/Documentation/mainboard/protectli/vp46xx.md index 12accb52dd..eada7ff0d7 100644 --- a/Documentation/mainboard/protectli/vp46xx.md +++ b/Documentation/mainboard/protectli/vp46xx.md @@ -10,7 +10,7 @@ This page describes how to run coreboot on the [Protectli VP46xx]. To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ @@ -84,7 +84,7 @@ ITE IT8786E or IT8784E, but the configuration is the same on this platform. - VP4630: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i3-10110U | +------------------+--------------------------------------------------+ @@ -98,7 +98,7 @@ ITE IT8786E or IT8784E, but the configuration is the same on this platform. - VP4650: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i5-10210U | +------------------+--------------------------------------------------+ @@ -112,7 +112,7 @@ ITE IT8786E or IT8784E, but the configuration is the same on this platform. - VP4670: -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i7-10810U | +------------------+--------------------------------------------------+ @@ -126,9 +126,13 @@ ITE IT8786E or IT8784E, but the configuration is the same on this platform. ## Useful links -- [VP4600 Hardware Overview](https://protectli.com/kb/vp4600-hardware-overview/) -- [VP4630 Product Page](https://protectli.com/product/vp4630/) -- [Protectli TPM module](https://protectli.com/product/tpm-module/) +```{toctree} +:maxdepth: 1 + +VP4600 Hardware Overview <https://protectli.com/kb/vp4600-hardware-overview/> +VP4630 Product Page <https://protectli.com/product/vp4630/> +Protectli TPM module <https://protectli.com/product/tpm-module/> +``` [Protectli VP46xx]: https://protectli.com/vault-6-port/ [MX25L12835F]: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8653/MX25L12835F,%203V,%20128Mb,%20v1.6.pdf diff --git a/Documentation/mainboard/purism/librem_14.md b/Documentation/mainboard/purism/librem_14.md index 777e90906d..22bb183e0d 100644 --- a/Documentation/mainboard/purism/librem_14.md +++ b/Documentation/mainboard/purism/librem_14.md @@ -2,7 +2,7 @@ This page describes how to run coreboot on the [Purism Librem 14]. -```eval_rst +```{eval-rst} +------------------+------------------------------------------------------+ | CPU | Intel Core i7-10710U | +------------------+------------------------------------------------------+ @@ -23,7 +23,7 @@ This page describes how to run coreboot on the [Purism Librem 14]. To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ diff --git a/Documentation/mainboard/purism/librem_mini.md b/Documentation/mainboard/purism/librem_mini.md index 0e1fbd0001..39cfca9710 100644 --- a/Documentation/mainboard/purism/librem_mini.md +++ b/Documentation/mainboard/purism/librem_mini.md @@ -2,7 +2,7 @@ This page describes how to run coreboot on the [Purism Librem Mini]. -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Core i7-8565U/8665U (v1) | | | Intel Core i7-10510U (v2) | @@ -25,7 +25,7 @@ This page describes how to run coreboot on the [Purism Librem Mini]. To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified). -```eval_rst +```{eval-rst} +-----------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +=================+=================================+=====================+ diff --git a/Documentation/mainboard/starlabs/labtop_cml.md b/Documentation/mainboard/starlabs/labtop_cml.md index f568d2bdb8..d9fdba5b8b 100644 --- a/Documentation/mainboard/starlabs/labtop_cml.md +++ b/Documentation/mainboard/starlabs/labtop_cml.md @@ -45,7 +45,7 @@ Please follow the [Star Labs build instructions](common/building.md) to build co ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/starlabs/labtop_kbl.md b/Documentation/mainboard/starlabs/labtop_kbl.md index 89a500128b..eb6893829d 100644 --- a/Documentation/mainboard/starlabs/labtop_kbl.md +++ b/Documentation/mainboard/starlabs/labtop_kbl.md @@ -42,7 +42,7 @@ Please follow the [Star Labs build instructions](common/building.md) to build co ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/starlabs/lite_glk.md b/Documentation/mainboard/starlabs/lite_glk.md index 849d3a8827..d31b680b8e 100644 --- a/Documentation/mainboard/starlabs/lite_glk.md +++ b/Documentation/mainboard/starlabs/lite_glk.md @@ -41,7 +41,7 @@ Please follow the [Star Labs build instructions](common/building.md) to build co ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/starlabs/lite_glkr.md b/Documentation/mainboard/starlabs/lite_glkr.md index 410747b20e..bf36281160 100644 --- a/Documentation/mainboard/starlabs/lite_glkr.md +++ b/Documentation/mainboard/starlabs/lite_glkr.md @@ -41,7 +41,7 @@ Please follow the [Star Labs build instructions](common/building.md) to build co ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/starlabs/starbook_adl.md b/Documentation/mainboard/starlabs/starbook_adl.md index 6ca956b89d..cce9cbe4b6 100644 --- a/Documentation/mainboard/starlabs/starbook_adl.md +++ b/Documentation/mainboard/starlabs/starbook_adl.md @@ -78,7 +78,7 @@ make ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/starlabs/starbook_tgl.md b/Documentation/mainboard/starlabs/starbook_tgl.md index 58be26f535..30810dd87f 100644 --- a/Documentation/mainboard/starlabs/starbook_tgl.md +++ b/Documentation/mainboard/starlabs/starbook_tgl.md @@ -44,7 +44,7 @@ Please follow the [Star Labs build instructions](common/building.md) to build co ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/supermicro/x10slm-f.md b/Documentation/mainboard/supermicro/x10slm-f.md index 97c78d6c3b..70e6e0ac14 100644 --- a/Documentation/mainboard/supermicro/x10slm-f.md +++ b/Documentation/mainboard/supermicro/x10slm-f.md @@ -4,13 +4,13 @@ This section details how to run coreboot on the [Supermicro X10SLM+-F]. ## Required proprietary blobs -```eval_rst +```{eval-rst} Please see :doc:`../../northbridge/intel/haswell/mrc.bin`. ``` ## Building coreboot -```eval_rst +```{eval-rst} If you haven't already, build the coreboot toolchain as described in :doc:`../../tutorial/part1`. ``` @@ -40,7 +40,7 @@ Now, run `make` to build the coreboot image. ## Flashing coreboot -```eval_rst +```{eval-rst} In addition to the information here, please see the :doc:`../../tutorial/flashing_firmware/index`. ``` @@ -119,7 +119,7 @@ eventually start. There is no such delay when running coreboot. ## ECC DRAM -```eval_rst +```{eval-rst} ECC DRAM seems to work, but please see :doc:`../../northbridge/intel/haswell/mrc.bin` for caveats. @@ -139,7 +139,7 @@ for caveats. in coreboot. The `coretemp` driver can still be used for accurate CPU temperature readings from an OS, and hence the OS can do fan control. -```eval_rst +```{eval-rst} Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ``` @@ -176,7 +176,7 @@ Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | :doc:`../../northbridge/intel/haswell/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md index 109885c093..206f7f9d98 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md @@ -6,10 +6,14 @@ Controller etc. ## Supported boards -- [X11SSH-TF](x11ssh-tf/x11ssh-tf.md) -- [X11SSH-F/LN4F](x11ssh-f/x11ssh-f.md) -- [X11SSM-F](x11ssm-f/x11ssm-f.md) -- [X11SSW-F](x11ssw-f/x11ssw-f.md) +```{toctree} +:maxdepth: 1 + +X11SSH-TF <x11ssh-tf/x11ssh-tf.md> +X11SSH-F/LN4F <x11ssh-f/x11ssh-f.md> +X11SSM-F <x11ssm-f/x11ssm-f.md> +X11SSW-F <x11ssw-f/x11ssw-f.md> +``` ## Required proprietary blobs @@ -42,7 +46,7 @@ These issues apply to all boards. Have a look at the board-specific issues, too. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md index 35b552fa53..836c733e8b 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md @@ -55,7 +55,7 @@ So the X11SSH-F just doesn't have 2 NICs populated. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md index 1616676453..963cf719ca 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md @@ -35,7 +35,7 @@ See general issue section. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md index 4e42809b43..3625a560c3 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md @@ -46,7 +46,7 @@ To disable the proprietary LAN firmware, the undocumented jumper J6 can be set t ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md index 8164df1b35..5b25643886 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md @@ -31,7 +31,7 @@ Flashing was performed through the BMC web interface, when a valid license was e ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x9sae.md b/Documentation/mainboard/supermicro/x9sae.md index 406785dcf2..df5595012a 100644 --- a/Documentation/mainboard/supermicro/x9sae.md +++ b/Documentation/mainboard/supermicro/x9sae.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the Supermicro [X9SAE] and [X9SAE-V] ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -81,7 +81,7 @@ seems that it shall not appear on X9SAE even if it is defined. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/system76/addw1.md b/Documentation/mainboard/system76/addw1.md index 332070a959..5d5dae346c 100644 --- a/Documentation/mainboard/system76/addw1.md +++ b/Documentation/mainboard/system76/addw1.md @@ -44,7 +44,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/addw2.md b/Documentation/mainboard/system76/addw2.md index a5015de65c..9a302a2ecc 100644 --- a/Documentation/mainboard/system76/addw2.md +++ b/Documentation/mainboard/system76/addw2.md @@ -43,7 +43,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/addw3.md b/Documentation/mainboard/system76/addw3.md index c964351914..dccd6301c0 100644 --- a/Documentation/mainboard/system76/addw3.md +++ b/Documentation/mainboard/system76/addw3.md @@ -48,7 +48,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/bonw14.md b/Documentation/mainboard/system76/bonw14.md index 2ea866b78e..cc94f39b21 100644 --- a/Documentation/mainboard/system76/bonw14.md +++ b/Documentation/mainboard/system76/bonw14.md @@ -53,7 +53,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/bonw15.md b/Documentation/mainboard/system76/bonw15.md index db32efe26f..63c00d9b61 100644 --- a/Documentation/mainboard/system76/bonw15.md +++ b/Documentation/mainboard/system76/bonw15.md @@ -42,7 +42,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/darp6.md b/Documentation/mainboard/system76/darp6.md index 364301495e..152727f18f 100644 --- a/Documentation/mainboard/system76/darp6.md +++ b/Documentation/mainboard/system76/darp6.md @@ -40,7 +40,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/darp7.md b/Documentation/mainboard/system76/darp7.md index d1dee864b9..06cf03445e 100644 --- a/Documentation/mainboard/system76/darp7.md +++ b/Documentation/mainboard/system76/darp7.md @@ -42,7 +42,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/darp8.md b/Documentation/mainboard/system76/darp8.md index 4d2da37876..1dadc4f3ca 100644 --- a/Documentation/mainboard/system76/darp8.md +++ b/Documentation/mainboard/system76/darp8.md @@ -40,7 +40,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ @@ -59,7 +59,7 @@ | External flashing | yes | +---------------------+---------------------+ ``` -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/darp9.md b/Documentation/mainboard/system76/darp9.md index b0f156695a..f7d299dbd2 100644 --- a/Documentation/mainboard/system76/darp9.md +++ b/Documentation/mainboard/system76/darp9.md @@ -39,7 +39,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/galp4.md b/Documentation/mainboard/system76/galp4.md index aa661fec88..bd8919cb90 100644 --- a/Documentation/mainboard/system76/galp4.md +++ b/Documentation/mainboard/system76/galp4.md @@ -42,7 +42,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/galp5.md b/Documentation/mainboard/system76/galp5.md index 82840502e3..440e387f9a 100644 --- a/Documentation/mainboard/system76/galp5.md +++ b/Documentation/mainboard/system76/galp5.md @@ -45,7 +45,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/galp6.md b/Documentation/mainboard/system76/galp6.md index e519dc3770..a6c103e3d1 100644 --- a/Documentation/mainboard/system76/galp6.md +++ b/Documentation/mainboard/system76/galp6.md @@ -38,7 +38,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/galp7.md b/Documentation/mainboard/system76/galp7.md index 3d27716957..41624ca5dc 100644 --- a/Documentation/mainboard/system76/galp7.md +++ b/Documentation/mainboard/system76/galp7.md @@ -35,7 +35,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/gaze15.md b/Documentation/mainboard/system76/gaze15.md index facdae63f7..45e4e2674c 100644 --- a/Documentation/mainboard/system76/gaze15.md +++ b/Documentation/mainboard/system76/gaze15.md @@ -51,7 +51,7 @@ make ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/gaze16.md b/Documentation/mainboard/system76/gaze16.md index d8bc7ca02c..a680a5cb9a 100644 --- a/Documentation/mainboard/system76/gaze16.md +++ b/Documentation/mainboard/system76/gaze16.md @@ -64,7 +64,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/gaze17.md b/Documentation/mainboard/system76/gaze17.md index cf7f0a2d9b..1456f9fcbb 100644 --- a/Documentation/mainboard/system76/gaze17.md +++ b/Documentation/mainboard/system76/gaze17.md @@ -39,7 +39,7 @@ The gaze17 comes in 2 variants: gaze17-3050 and gaze17-3060-b. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/gaze18.md b/Documentation/mainboard/system76/gaze18.md index fe564e8ebb..5c3212a575 100644 --- a/Documentation/mainboard/system76/gaze18.md +++ b/Documentation/mainboard/system76/gaze18.md @@ -49,7 +49,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/lemp10.md b/Documentation/mainboard/system76/lemp10.md index 89e57b5225..b0888af2ce 100644 --- a/Documentation/mainboard/system76/lemp10.md +++ b/Documentation/mainboard/system76/lemp10.md @@ -40,7 +40,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/lemp11.md b/Documentation/mainboard/system76/lemp11.md index f05d63a197..acb791bb49 100644 --- a/Documentation/mainboard/system76/lemp11.md +++ b/Documentation/mainboard/system76/lemp11.md @@ -39,7 +39,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/lemp12.md b/Documentation/mainboard/system76/lemp12.md index 55a2e35cc2..a095bad6c8 100644 --- a/Documentation/mainboard/system76/lemp12.md +++ b/Documentation/mainboard/system76/lemp12.md @@ -39,7 +39,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/lemp9.md b/Documentation/mainboard/system76/lemp9.md index 9739484820..c21618860d 100644 --- a/Documentation/mainboard/system76/lemp9.md +++ b/Documentation/mainboard/system76/lemp9.md @@ -52,7 +52,7 @@ make ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ diff --git a/Documentation/mainboard/system76/oryp10.md b/Documentation/mainboard/system76/oryp10.md index 921585cb2b..40872e3d66 100644 --- a/Documentation/mainboard/system76/oryp10.md +++ b/Documentation/mainboard/system76/oryp10.md @@ -46,7 +46,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/oryp11.md b/Documentation/mainboard/system76/oryp11.md index ad0a54e496..bd86632e9f 100644 --- a/Documentation/mainboard/system76/oryp11.md +++ b/Documentation/mainboard/system76/oryp11.md @@ -43,7 +43,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/oryp5.md b/Documentation/mainboard/system76/oryp5.md index 662581cf18..bfde6c0289 100644 --- a/Documentation/mainboard/system76/oryp5.md +++ b/Documentation/mainboard/system76/oryp5.md @@ -47,7 +47,7 @@ make ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/oryp6.md b/Documentation/mainboard/system76/oryp6.md index 2c1975e621..6a52c54281 100644 --- a/Documentation/mainboard/system76/oryp6.md +++ b/Documentation/mainboard/system76/oryp6.md @@ -37,7 +37,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/oryp7.md b/Documentation/mainboard/system76/oryp7.md index 4672d67bd5..6496aea96d 100644 --- a/Documentation/mainboard/system76/oryp7.md +++ b/Documentation/mainboard/system76/oryp7.md @@ -48,7 +48,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/oryp8.md b/Documentation/mainboard/system76/oryp8.md index cfd59d0e77..53eb446096 100644 --- a/Documentation/mainboard/system76/oryp8.md +++ b/Documentation/mainboard/system76/oryp8.md @@ -47,7 +47,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-----------------+ | Type | Value | +=====================+=================+ diff --git a/Documentation/mainboard/system76/oryp9.md b/Documentation/mainboard/system76/oryp9.md index 87e176b860..33ccf00b17 100644 --- a/Documentation/mainboard/system76/oryp9.md +++ b/Documentation/mainboard/system76/oryp9.md @@ -44,7 +44,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/system76/serw13.md b/Documentation/mainboard/system76/serw13.md index 6b56a39afa..0695c8f5e5 100644 --- a/Documentation/mainboard/system76/serw13.md +++ b/Documentation/mainboard/system76/serw13.md @@ -46,7 +46,7 @@ ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+---------------------+ | Type | Value | +=====================+=====================+ diff --git a/Documentation/mainboard/ti/beaglebone-black.md b/Documentation/mainboard/ti/beaglebone-black.md index 7fc676241c..36086186d8 100644 --- a/Documentation/mainboard/ti/beaglebone-black.md +++ b/Documentation/mainboard/ti/beaglebone-black.md @@ -56,7 +56,7 @@ Wireless. The serial runs at 3.3V and 115200 8n1. The pin mapping is shown below for J1. - ```eval_rst + ```{eval-rst} +----------------------------+------------+ | Pin number | Function | +============================+============+ diff --git a/Documentation/mainboard/up/squared/index.md b/Documentation/mainboard/up/squared/index.md index 2895e1f6a0..f402095fc5 100644 --- a/Documentation/mainboard/up/squared/index.md +++ b/Documentation/mainboard/up/squared/index.md @@ -15,7 +15,7 @@ ## Mainboard components ### Platform -```eval_rst +```{eval-rst} +------------------+----------------------------------+ | CPU | Intel Atom, Celeron, Pentium | +------------------+----------------------------------+ @@ -28,7 +28,7 @@ ``` ### Flash chip -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ |